Prospects of Molecular Scale Logic Gates and Logic Circuits

Author(s):  
Shammai Speiser
2016 ◽  
Vol 52 (2) ◽  
pp. 402-405 ◽  
Author(s):  
Sai Bi ◽  
Jiayan Ye ◽  
Ying Dong ◽  
Haoting Li ◽  
Wei Cao

A cascade recycling amplification (CRA) that implements cascade logic circuits with feedback amplification function is developed for label-free chemiluminescence detection of microRNA-122 with an ultrahigh sensitivity of 0.82 fM and excellent specificity, which is applied to construct a series of molecular-scale two-input logic gates by using microRNAs as inputs and CRA products as outputs.


2018 ◽  
Vol 42 (22) ◽  
pp. 18050-18058 ◽  
Author(s):  
Juan D. Villada ◽  
Richard F. D’Vries ◽  
Mario Macías ◽  
Fabio Zuluaga ◽  
Manuel N. Chaur

A new polymorph of fluorescein hydrazone was fully characterized via single X-ray crystallography. In addition, multiple logic circuits and a Half-Adder operator were designed using the fluorescence and UV-Vis switching responses of the fluorescein compound to different metal cations and pH changes.


Author(s):  
Abhishek Modi ◽  
Prasanna S. Gandhi ◽  
Himani Shah ◽  
Shiv Govind Singh

Binary logic devices constructed using moving mechanical components at microscale can be useful in harsh working environments where their electronic counterparts would fail. This paper demonstrates a novel design, extensive analysis, and development method of a micromechanical NOT gate and analyzes important issues in further development of mechanical logic circuits. The proposed NOT gate uses parallelogram flexures and flexure beam hinges to realize the logic without effects of friction. Extensive finite element (FE) analysis, carried out using ANSYS, enables us to arrive at the final design dimensions. We introduce a new term “Energy Transmission Ratio (ETR)” specific to flexure mechanism-based transmission systems and further FE analysis brings out interesting property that ETR has an optimal value for given flexure geometry. This result can be useful while connecting several logic gates to develop mechanical logic circuits. A graphical procedure for analysis of such connections is outlined based on our FE results. Finally, the proposed NOT gate is fabricated with SU-8 and demonstrated working successfully.


Author(s):  
Sepher Tabrizchi ◽  
Fazel Sharifi ◽  
Abdel-Hameed A. Badawy

Traditional silicon binary circuits continue to face challenges such as high leakage power dissipation and large area of interconnections. Multiple-Valued Logic (MVL) and nano-devices are two feasible solutions to overcome these problems. In this paper, we present a novel method to design ternary logic circuits based on Carbon Nanotube Field Effect Transistors (CNFETs). The proposed designs use the unique properties of CNFETs, e.g., adjusting the Carbon Nanotube (CNT) diameters to have the desired threshold voltage and have the same mobility of P-FET and N-FET transistors. Each of our designed logic circuits implements a logic function and its complementary via a control signal. Also, these circuits have a high impedance state which saves power while the circuits are not in use. We show a more detailed application of our approach by designing a two-digit adder-subtractor circuit. We simulate the proposed ternary circuits using HSPICE via standard 32nm CNFET technology. The simulation results indicate the correct operation of the designs under different process, voltage and temperature (PVT) variations. Moreover, we designed a two-digit adder/subtractor and a power efficient ternary logic ALU based on the proposed gates. Simulation results show that the two-digit adder/subtractor using our proposed gates has 12X and 5X lower power consumption and PDP (power delay product) respectively, compared to previous designs.


2003 ◽  
Vol 68 (4-5) ◽  
pp. 321-326 ◽  
Author(s):  
Milan Stojanovic ◽  
Dragan Nikic ◽  
Darko Stefanovic

We recently reported the first complete set of molecular-scale logic gates based on deoxyribozymes. Here we report how we tile these logic gates and construct new logic elements: OR, NAND, and the first element with four inputs (i1^i5)V(i2^i6). Tiling of logic gates was achieved through a common substrate used for core deoxyribozyme; degradation of this substrate defines the output. This kind of connection between logic gates is an implicit- OR tiling, because it suffices that one componenet of the network is active for the whole network to give an output of 1.


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