Design, Analysis and Fabrication of Microflexural NOT Gate

Author(s):  
Abhishek Modi ◽  
Prasanna S. Gandhi ◽  
Himani Shah ◽  
Shiv Govind Singh

Binary logic devices constructed using moving mechanical components at microscale can be useful in harsh working environments where their electronic counterparts would fail. This paper demonstrates a novel design, extensive analysis, and development method of a micromechanical NOT gate and analyzes important issues in further development of mechanical logic circuits. The proposed NOT gate uses parallelogram flexures and flexure beam hinges to realize the logic without effects of friction. Extensive finite element (FE) analysis, carried out using ANSYS, enables us to arrive at the final design dimensions. We introduce a new term “Energy Transmission Ratio (ETR)” specific to flexure mechanism-based transmission systems and further FE analysis brings out interesting property that ETR has an optimal value for given flexure geometry. This result can be useful while connecting several logic gates to develop mechanical logic circuits. A graphical procedure for analysis of such connections is outlined based on our FE results. Finally, the proposed NOT gate is fabricated with SU-8 and demonstrated working successfully.

2010 ◽  
Vol 10 (04) ◽  
pp. 601-621 ◽  
Author(s):  
ANDREAS RITTWEGER ◽  
SUSANNE CHRISTIANSON ◽  
HUBA ÖRY

The dimensioning of an orthotropically stiffened cylindrical CFRP shell subjected to the introduction of concentrated axial loads using rapid analytical methods is presented. For stress calculation the shell equations are simplified by applying the semibending theory and integrated by employing the transfer matrix method. Analytical approaches are used for stability verification. The dimensioning considers required constraints in the force flux distribution, strength of the laminate, general instability, panel instability (from ring frame to ring frame) and local instability. The rapid analytical methods allow mass optimization. The final design is confirmed by detailed FE analysis. A comparison of the FE analysis with the analytical results is shown.


2018 ◽  
Vol 42 (22) ◽  
pp. 18050-18058 ◽  
Author(s):  
Juan D. Villada ◽  
Richard F. D’Vries ◽  
Mario Macías ◽  
Fabio Zuluaga ◽  
Manuel N. Chaur

A new polymorph of fluorescein hydrazone was fully characterized via single X-ray crystallography. In addition, multiple logic circuits and a Half-Adder operator were designed using the fluorescence and UV-Vis switching responses of the fluorescein compound to different metal cations and pH changes.


2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Yuanping Song ◽  
Robert M. Panas ◽  
Samira Chizari ◽  
Lucas A. Shaw ◽  
Julie A. Jackson ◽  
...  
Keyword(s):  

2016 ◽  
Vol 52 (2) ◽  
pp. 402-405 ◽  
Author(s):  
Sai Bi ◽  
Jiayan Ye ◽  
Ying Dong ◽  
Haoting Li ◽  
Wei Cao

A cascade recycling amplification (CRA) that implements cascade logic circuits with feedback amplification function is developed for label-free chemiluminescence detection of microRNA-122 with an ultrahigh sensitivity of 0.82 fM and excellent specificity, which is applied to construct a series of molecular-scale two-input logic gates by using microRNAs as inputs and CRA products as outputs.


Author(s):  
Sepher Tabrizchi ◽  
Fazel Sharifi ◽  
Abdel-Hameed A. Badawy

Traditional silicon binary circuits continue to face challenges such as high leakage power dissipation and large area of interconnections. Multiple-Valued Logic (MVL) and nano-devices are two feasible solutions to overcome these problems. In this paper, we present a novel method to design ternary logic circuits based on Carbon Nanotube Field Effect Transistors (CNFETs). The proposed designs use the unique properties of CNFETs, e.g., adjusting the Carbon Nanotube (CNT) diameters to have the desired threshold voltage and have the same mobility of P-FET and N-FET transistors. Each of our designed logic circuits implements a logic function and its complementary via a control signal. Also, these circuits have a high impedance state which saves power while the circuits are not in use. We show a more detailed application of our approach by designing a two-digit adder-subtractor circuit. We simulate the proposed ternary circuits using HSPICE via standard 32nm CNFET technology. The simulation results indicate the correct operation of the designs under different process, voltage and temperature (PVT) variations. Moreover, we designed a two-digit adder/subtractor and a power efficient ternary logic ALU based on the proposed gates. Simulation results show that the two-digit adder/subtractor using our proposed gates has 12X and 5X lower power consumption and PDP (power delay product) respectively, compared to previous designs.


Author(s):  
Zuolin Liu ◽  
Hongbin Fang ◽  
Jian Xu ◽  
K. W. Wang

Abstract With the infinite design space and the excellent folding-induced deformability, origami has been recognized as an effective tool for developing reconfigurable structures. Particularly, the multistable origami structure, which possesses more than one stable configuration that is distinct in shape and mechanical properties, has received wide research attention. Generally, the origami structure reaches a kinematic singularity point when switching among different stable configurations. At this critical state, multiple switching sequences are possible, and the actual transition is generally hard to predict. In this paper, evolving from the conventional bistable Miura-ori unit, a triple-cell origami structure with eight potential stable configurations is proposed, which serves as a platform for investigating the transition sequences among different stable configurations. To quantify the overall elastic potential of the structure, besides the conventional elastic energy originating from the rigid folding creases, extra elastic potential induced by the mismatch among the cells are introduced, so that folding of the triple-cell structure is no longer a strict single degree-of-freedom mechanism. Instead, the three cells can deform asynchronously to avoid reaching the kinematic singularity point. Hence, under displacement loading, the transition sequence of the multistable structure is predicted by performing optimization on the elastic potential energy. It shows that sequences with multifarious characteristics are possible, including reversible and irreversible transitions, and transitions with symmetric and asymmetric energy barriers. Considering that the fundamental transition mechanisms are of great significance in understanding the quasi-static and dynamic behaviors of multistable structures, the results could be potentially employed for developing morphing structures, adaptive metamaterials, and mechanical logic gates.


2018 ◽  
Vol 7 (4.5) ◽  
pp. 102
Author(s):  
E. V.Naga Lakshmi ◽  
Dr. N.Siva Sankara Reddy

In recent years Reversible Logic Circuits (RLC) are proved to be more efficient in terms of power dissipation. Hence, most of the researchers developed Reversible logic circuits for low power applications. RLC are designed with the help of Reversible Logic Gates (RLG).   Efficiency of the Reversible gates is measured in terms of Quantum cost, gate count, garbage output lines, logic depth and constant inputs. In this paper, measurement of power for RLG is done. Basic RLGs are designed using GDI technology and compared in terms of power dissipation. 1 bit Full subtractor is designed using EVNL gate [1] and also with TG& Fy [6] gates. The power dissipation is compared with 1 bit TR gate [5] full subtractor.  Then 2 bit, 4 bit and 8 bit subtractors are designed and compared the powers. Proposed 4 bit and 8 bit full subtractors are dissipating less power when compared to TR gate 4 bit and 8 bit subtractors.  


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