A full-range dual material gate tunnel field effect transistor drain current model considering both source and drain depletion region band-to-band tunneling

2014 ◽  
Vol 14 (1) ◽  
pp. 280-287 ◽  
Author(s):  
Pratyush Pandey ◽  
Rajat Vishnoi ◽  
M. Jagadesh Kumar
2021 ◽  
Author(s):  
AJAY Kumar SINGH ◽  
Tan Chun Fui ◽  
Lim Way Soong

Abstract Purpose: A TFET (Tunnel Field Effect Transistor) is a potential candidate to replace CMOS in deep-submicron region due to its lower SS (subthreshold swing, <60 mV/decade) at room temperature. However, the conventional TFET suffers from low tunneling current and high ambipolar current. To overcome these two drawbacks a new structure, known as Hetero-dielectric gate TFET (HDG TFET), has been proposed in the literature. Method: To analyze the electrical characteristics of this structure, a closed form of analytical expression of current is required. This paper presents the closed form of compact analytical current model for HDG TFET structure without using any iterative method. Result: The developed compact analytical models show a good agreement with 2-D TCAD simulator results. The model is used to study in depth about the electrical behavior of the device under various physical variation as well as bias variation. Conclusion: The proposed model can be incorporated into SPICE to describe the behavior of HDG TFET faster.


2017 ◽  
Vol 122 (1) ◽  
pp. 014502 ◽  
Author(s):  
Prateek Jain ◽  
Priyank Rastogi ◽  
Chandan Yadav ◽  
Amit Agarwal ◽  
Yogesh Singh Chauhan

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