Background:
Power reduction is a severe design concern for submicron logic circuits, which can be achieved by scaling the supply voltage. Modern Field Effect Transistor (FET) circuits require at least 60 mV of gate voltage for a better current drive at room temperature. The tunnel Field Effect Transistor (TFET) is a leading future device due to its steep subthreshold swing (SS), making its ideal device at a low power supply. Steep switching TFET can extend the supply voltage scaling with improved energy efficiency for digital and analog applications. These devices suffer from a sizeable ambipolar current, which cannot be reduced using Dual Metal Gate (DMG) alone. Gate dielectric materials play a crucial role in suppressing the ambipolar current.
Objective:
This paper presents a new structure known as triple-gate-dielectric (DM_TGD) TFET, which combines the dielectric and work function engineering to solve these problems.
Method:
The proposed structure uses DMG with three dielectric gate materials titanium oxide (TiO2), aluminum oxide (Al2O3), and silicon dioxide (SiO2). The high dielectric material alone as gate oxide increases the fringing fields, which results in higher gate capacitance. This structure has been simulated using 2-D ATLAS simulator in terms of drive current (Ion), ambipolar current (Iamb) and transconductance (gm).
Results:
The device offers better gm, lower SS, lower leakage and larger drive currents due to weaker insulating barriers at the tunneling junction. Also, higher effective dielectric constant gives better gate coupling and lower trap density.
Conclusion:
The proposed structure suppresses the ambipolar current and enhance the drive current with reduced SCEs.
Design and Performasnce Analysis of Hybrid Full Adder Using Finfet 40nm Technology
