Organic contamination of silicon wafers by buffered oxide etching

1993 ◽  
pp. 88-92
Author(s):  
M. Beyer ◽  
K. Budde ◽  
W. Holzapfel
Keyword(s):  
Silicon Wafers ◽  
Organic Contamination ◽  
Oxide Etching

Organic contamination of silicon wafers by buffered oxide etching

1993 ◽  
Vol 63 (1-4) ◽  
pp. 88-92 ◽  
Author(s):  
M. Beyer ◽  
K. Budde ◽  
W. Holzapfel
Keyword(s):  
Silicon Wafers ◽  
Organic Contamination ◽  
Oxide Etching

Acceleration of Organic Contaminant Adsorption Onto Silicon Surfaces in the Presence of Residual Fluorine

1997 ◽  
Vol 477 ◽  
Author(s):  
Koichiro Saga ◽  
Takeshi Hattori
Keyword(s):  
Photoelectron Spectroscopy ◽  
Organic Contaminants ◽  
Surface Composition ◽  
Electrostatic Force ◽  
Silicon Wafers ◽  
Silicon Surfaces ◽  
Gas Chromatography Mass Spectrometry ◽  
Organic Contamination ◽  
X Ray ◽  
Polar Groups

ABSTRACTThe influence of fluorine atoms remaining after HF treatment on the adsorption of organic contaminants onto the surface of silicon wafers was investigated by analyzing the organic contaminants with gas chromatography-mass spectrometry following thermodesorption (TDGC/MS), and the surface composition with X-ray photoelectron spectroscopy (XPS). It has been found that residual fluorine on silicon surfaces after cleaning of the silicon wafers with either aqueous HF or anhydrous HF accelerates the adsorption of organic contamination onto the silicon surfaces. This would be due to the electrostatic force of attraction between the polar groups of organic compounds and the residual fluorine on the silicon surface.

Dry Cleaning of Organic Contamination on Silicon Wafers Using Rapid Optical Surface Treatment

2001 ◽  
Vol 76-77 ◽  
pp. 59-62 ◽  
Author(s):  
Adrien Danel ◽  
Névine Rochat ◽  
M. Olivier ◽  
A. Roche ◽  
F. Tardif
Keyword(s):  
Surface Treatment ◽  
Silicon Wafers ◽  
Optical Surface ◽  
Organic Contamination ◽  
Dry Cleaning

Vapor Phase Cleaning of Silicon Wafers

1992 ◽  
Vol 259 ◽  
Author(s):  
Bruce E. Deal ◽  
C. Robert Helms
Keyword(s):  
Vapor Phase ◽  
Silicon Wafers ◽  
Native Oxide ◽  
Oxide Formation ◽  
Future Directions ◽  
Silicon Oxides ◽  
Impurity Removal ◽  
Oxide Etching ◽  
Device Applications ◽  
Integrated Processing

ABSTRACTVapor phase cleaning of silicon wafers is reviewed. Particular emphasis is placed on oxide etching and removal, including the mechanisms involved in vapor HF etching of silicon oxides. Other items discussed include native oxide formation, impurity removal, and device applications. Future directions involving other chemistries and integrated processing are summarized.

Evaluation of Chemical Filters Using Wafer Exposure Method and Experimental FFU

2003 ◽  
Vol 46 (1) ◽  
pp. 55-58 ◽  
Author(s):  
Tatsuo Nonaka ◽  
Kikuo Takeda ◽  
Reiko Iikawa ◽  
Toshikazu Taira ◽  
Taketoshi Fujimoto ◽  
...  
Keyword(s):  
Mass Spectrometry ◽  
Gas Chromatography ◽  
Organic Contaminants ◽  
Semiconductor Manufacturing ◽  
Silicon Wafers ◽  
Gas Chromatography Mass Spectrometry ◽  
Organic Contamination ◽  
Volatile Organic ◽  
Exposure Method ◽  
Molecular Contaminants

Airborne molecular contaminants (AMCs) have become a serious problem with recent advances in semiconductor manufacturing technology. The use of chemical filters to remove AMCs in cleanrooms is critical for improving the yield of semiconductor devices. The experimental FFU is designed for the evaluation of chemical filters. Silicon wafers exposed in the downstream air of chemical filters in the experimental FFU were investigated by Wafer Thermal Desorption—Gas Chromatography-Mass Spectrometry (WTD-GC-MS). Organic contaminants caused by outgassing from the chemical filter were detected on the surface of the silicon wafer and compared among various chemical filters. Results showed that the volatile organic compounds (VOCs) emitted from chemical filters adsorbed on the surface of silicon wafers located downstream of the filters. It was also found that the organic contamination on the surface was related to the amount of outgassing from the chemical filters. In addition, the rates of decrease of organic contamination emitted from various ULPA filters were compared using the experimental FFU. The rate of decrease of organic contamination emitted from the low-outgassing ULPA filter was also superior to that of the normal ULPA filter.

Determination of Organic Contamination From Polymeric Construction Materials for Semiconductor Technology

1995 ◽  
Vol 386 ◽  
Author(s):  
Klaus J. Budde
Keyword(s):  
Polyvinylidene Fluoride ◽  
Elevated Temperatures ◽  
Construction Materials ◽  
Acrylonitrile Butadiene Styrene ◽  
Silicon Wafers ◽  
Test Method ◽  
Organic Contamination ◽  
Surface Contaminants ◽  
Ultratrace Detection ◽  
Mechanism Of Impact

ABSTRACTVolatile organic surface contaminants on silicon wafers lead to strong detrimental impact on semiconductor production yield and product reliability. Our model for the mechanism of impact is introduced and discussed.Only a few metrology methods are suited for the ultratrace detection of volatiles on surfaces and their identification. The data presented in this paper were achieved by ion mobility spectrometry followed by mass spectrometry (IMS/MS).Eleven commercial wafer storage and transport boxes were screened by sampling the contaminants onto silicon wafers at room temperature. In a second set of experiments, enhanced stress testing was performed at elevated temperatures for polypropylene, polycarbonate, polytetrafluoro ethylene, perfluoro alkoxy polymer, polyvinylidene fluoride and acrylonitrile-butadiene-styrene copolymer. From the outgassing behaviour of single contaminants, valuable information can be achieved.Test method E 46 (SEMI) samples the contaminants onto the wafer under the real conditions of use. The data for six virgin minienvironments are shown.

Arsenic segregation in polysilicon

1983 ◽  
Vol 41 ◽  
pp. 154-155 ◽  
Author(s):  
P.E. Batson ◽  
C.R.M. Grovenor ◽  
D.A. Smith ◽  
C. Wong
Keyword(s):  
Incident Beam ◽  
Silicon Wafers ◽  
Chemical Polishing ◽  
Bright Field Image ◽  
Beam Size ◽  
Stem Analysis ◽  
Bright Field ◽  
Twin Boundaries ◽  
X Ray ◽  
Line Scan

In this work As doped polysilicon was deposited onto (100) silicon wafers by APCVD at 660°C from a silane-arsine mixture, followed by a ten minute anneal at 1000°C, and in one case a further ten minute anneal at 700°C. Specimens for TEM and STEM analysis were prepared by chemical polishing. The microstructure, which is unchanged by the final 700°C anneal,is shown in Figure 1. It consists of numerous randomly oriented grains many of which contain twins.X-ray analysis was carried out in a VG HB5 STEM. As K α x-ray counts were collected from STEM scans across grain and twin boundaries, Figures 2-4. The incident beam size was about 1.5nm in diameter, and each of the 20 channels in the plots was sampled from a 1.6nm length of the approximately 30nm line scan across the boundary. The bright field image profile along the scanned line was monitored during the analysis to allow correlation between the image and the x-ray signal.

Preparation of integrated circuits for TEM electromigration in situ studies

1986 ◽  
Vol 44 ◽  
pp. 882-883
Author(s):  
J. V. Maskowitz ◽  
W. E. Rhoden ◽  
D. R. Kitchen ◽  
R. E. Omlor ◽  
P. F. Lloyd
Keyword(s):  
Integrated Circuits ◽  
Crystallographic Orientation ◽  
Silicon Wafers ◽  
Minimum Size ◽  
Test Vehicle ◽  
In Situ Studies ◽  
Boron Doped ◽  
Doped Silicon ◽  
Drill Holes

The fabrication of the aluminum bridge test vehicle for use in the crystallographic studies of electromigration involves several photolithographic processes, some common, while others quite unique. It is most important to start with a clean wafer of known orientation. The wafers used are 7 mil thick boron doped silicon. The diameter of the wafer is 1.5 inches with a resistivity of 10-20 ohm-cm. The crystallographic orientation is (111).Initial attempts were made to both drill and laser holes in the silicon wafers then back fill with photoresist or mounting wax. A diamond tipped dentist burr was used to successfully drill holes in the wafer. This proved unacceptable in that the perimeter of the hole was cracked and chipped. Additionally, the minimum size hole realizable was > 300 μm. The drilled holes could not be arrayed on the wafer to any extent because the wafer would not stand up to the stress of multiple drilling.

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