Memristor emulation and analog application using differential difference current conveyor of CC-II in CMOS technology

Author(s):  
Mohd. Ahmer ◽  
N.R. Kidwai ◽  
M. Yusuf Yasin
2013 ◽  
Vol 2013 ◽  
pp. 1-11 ◽  
Author(s):  
Neeta Pandey ◽  
Praveen Kumar ◽  
Jaya Choudhary

This paper proposes current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA), a new active building block for analog signal processing. The functionality of the proposed block is verified via SPICE simulations using 0.25 μm TSMC CMOS technology parameters. The usefulness of the proposed element is demonstrated through an application, namely, wave filter. The CCDDCCTA-based wave equivalents are developed which use grounded capacitors and do not employ any resistors. The flexibility of terminal characteristics is utilized to suggest an alternate wave equivalents realization scheme which results in compact realization of wave filter. The feasibility of CCDDCCTA-based wave active filter is confirmed through simulation of a third-order Butterworth filter. The filter cutoff frequency can be tuned electronically via bias current.


2007 ◽  
Vol 16 (04) ◽  
pp. 627-639 ◽  
Author(s):  
VARAKORN KASEMSUWAN ◽  
WEERACHAI NAKHLO

A simple 1.5 V rail-to-rail CMOS current conveyor is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The current conveyor exhibits low impedance at terminal X (7.2 Ω) and can drive ± 0.6 V to the 300 Ω with the total harmonic distortion of 0.55% at the operating frequency of 3 MHz. The voltage transfer error (between the Y and X terminals) and current transfer error (between the X and Y terminals) are small (-0.2 dB). The power dissipation and bandwidth are 532 μW and over 300 MHz, respectively.


1998 ◽  
Vol 08 (05n06) ◽  
pp. 541-558 ◽  
Author(s):  
VINCENT C. GAUDET ◽  
P. GLENN GULAK

This paper is a tutorial introduction to field-programmable analog arrays, as well as a review of existing field-programmable analog array architectures, of both educational and industrial origin. Circuit issues relevant to the development of high-bandwidth FPAAs are presented. A current conveyor-based architecture, which promises to achieve video bandwidths, is described. Test results are presented for the CMOS current conveyor-based FPAA building block, with programmable transconductors and capacitors. Measurements indicate bandwidths in excess of 10 MHz, and functionality of amplifiers, integrators, differentiators, and adders. The die area is 1.5 mm× 3.5 mm in a 0.8 μm CMOS technology.


This article given a second generation current controlled current conveyor positive (CCCII+), second generation current controlled current conveyor negative (CCCII-), Quadrature oscillator with high-Q frequency choosing network and implementing completely different phase oscillators by employing (CCCII+) positive and (CCCII-) negative, and high band pass filter network, the approach is predicted on the CMOS technology . The root of this concept is, considering a customary voltage mode oscillator which consists of band pass filter with prime quality issue (high-Q) and voltage mode amplifier is transfigure into current mode oscillator by replacing tans-conductance amplifier. Because the loop of the oscillator is has lavish selectivity, the oscillator process less distortion. In addition 3dB bandwidth, oscillating condition, oscillation frequency of the oscillator could linearly, independently and electronically be tuned by adjusting the bias current of the (CCCII±)[1], lastly different simulations have been carried out to verify the linearity between output and input ports, range of frequency operations. These results can justify that the designed circuits are workable.


2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
Neeta Pandey ◽  
Sajal K. Paul

A universal voltage-mode filter (VM) and a current-mode filter (CM) based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) are proposed. Both the circuits use a single DVCCTA, two capacitors, and a single resistor. The filters enjoy low-sensitivity performance and low component spread and exhibit electronic tunability of filter parameters via bias currents of DVCCTA. SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.


2011 ◽  
Vol 2011 ◽  
pp. 1-10 ◽  
Author(s):  
Neeta Pandey ◽  
Sajal K. Paul

A new active building block for analog signal processing, namely, differential difference current conveyor transconductance amplifier (DDCCTA), is presented, and performance is checked through PSPICE simulations which show the usability of the proposed element is up to 201 MHz. The proposed block is implemented using 0.25 μm TSMC CMOS technology. Some of the applications are presented using the proposed DDCCTA, namely, a voltage mode multifunction filter, a current mode universal filter, an oscillator, current and voltage amplifiers, and grounded inductor simulator. The feasibility of DDCCTA and its applications is confirmed via PSPICE simulations.


2009 ◽  
Vol 18 (05) ◽  
pp. 875-897 ◽  
Author(s):  
TAREK M. HASSAN ◽  
SOLIMAN A. MAHMOUD

A fully programmable second-order universal filter with independently controllable characteristics is presented in this paper. The proposed filter is based on a new ± 0.75 V second-generation current conveyor with digitally programmable current gain. The input stage of the current conveyor is realized using two complementary MOS differential pairs to ensure rail-to-rail operation. The output stage consists of a Class-AB CMOS push-pull network, which guarantees high current driving capability with a 47.2 μA standby current. The digital programmability of the current conveyor, based on transistor arrays and MOS switches, provides variable current gain using a digital code-word. Two approaches for implementing current conveyors with programmable current gain either greater or less than one are described. The fully programmable universal filter and the proposed digitally programmable current conveyor circuits are simulated using PSPICE with 0.25 μm CMOS technology from MOSIS.


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