FULLY PROGRAMMABLE UNIVERSAL FILTER WITH INDEPENDENT GAIN-ω0-Q CONTROL BASED ON NEW DIGITALLY PROGRAMMABLE CMOS CCII

2009 ◽  
Vol 18 (05) ◽  
pp. 875-897 ◽  
Author(s):  
TAREK M. HASSAN ◽  
SOLIMAN A. MAHMOUD

A fully programmable second-order universal filter with independently controllable characteristics is presented in this paper. The proposed filter is based on a new ± 0.75 V second-generation current conveyor with digitally programmable current gain. The input stage of the current conveyor is realized using two complementary MOS differential pairs to ensure rail-to-rail operation. The output stage consists of a Class-AB CMOS push-pull network, which guarantees high current driving capability with a 47.2 μA standby current. The digital programmability of the current conveyor, based on transistor arrays and MOS switches, provides variable current gain using a digital code-word. Two approaches for implementing current conveyors with programmable current gain either greater or less than one are described. The fully programmable universal filter and the proposed digitally programmable current conveyor circuits are simulated using PSPICE with 0.25 μm CMOS technology from MOSIS.

2007 ◽  
Vol 16 (04) ◽  
pp. 627-639 ◽  
Author(s):  
VARAKORN KASEMSUWAN ◽  
WEERACHAI NAKHLO

A simple 1.5 V rail-to-rail CMOS current conveyor is presented. The circuit is developed based on a complementary source follower with a common-source output stage. The circuit is designed using a 0.13 μm CMOS technology and HSPICE is used to verify the circuit performance. The current conveyor exhibits low impedance at terminal X (7.2 Ω) and can drive ± 0.6 V to the 300 Ω with the total harmonic distortion of 0.55% at the operating frequency of 3 MHz. The voltage transfer error (between the Y and X terminals) and current transfer error (between the X and Y terminals) are small (-0.2 dB). The power dissipation and bandwidth are 532 μW and over 300 MHz, respectively.


2014 ◽  
Vol 2014 ◽  
pp. 1-14 ◽  
Author(s):  
Neelofer Afzal ◽  
Devesh Singh

This paper presents a novel mixed mode universal filter configuration capable of working in voltage and transimpedance mode. The proposed single filter configuration can be reconfigured digitally to realize all the five second order filter functions (types) at single output port. Other salient features of proposed configuration include independently programmable filter parameters, full cascadability, and low sensitivity figure. However, all these features are provided at the cost of quite large number of active elements. It needs three digitally programmable current feedback amplifiers and three digitally programmable current conveyors. Use of six active elements is justified by introducing three additional reduced hardware mixed mode universal filter configurations and its comparison with reported filters.


2013 ◽  
Vol 22 (04) ◽  
pp. 1350019 ◽  
Author(s):  
SOLIMAN A. MAHMOUD ◽  
EMAN A. SOLIMAN

In this paper, a digitally programmable OTA-based multi-standard receiver baseband chain is presented. The multi-standard receiver baseband chain consists of two programmable gain amplifiers (PGA1 and PGA2) and a fourth-order LPF. The receiver is suitable for Bluetooth/UMTS/DVB-H/WLAN standards. Three different programmable OTA architectures based on second generation current conveyors (CCIIs) and Current Division Networks (CDNs) are discussed. The programmable OTA with the lowest power consumption, moderate area and good linearity — better than -50 dB HD3 — is selected to realize the multi-standard baseband receiver chain. The power consumption of the receiver chain is 6 mW. The DC gain varies over a 68 dB range with 1 MHz to 13.6 MHz programmable bandwidth. The receiver baseband chain is realized using 90 nm CMOS technology model under ±0.5 V voltage supply.


2018 ◽  
Vol 27 (13) ◽  
pp. 1850198 ◽  
Author(s):  
Cuirong Zhu ◽  
Chunhua Wang ◽  
Hua Chen ◽  
Xin Zhang ◽  
Jingru Sun ◽  
...  

This paper introduces a novel CMOS second-generation current-controlled current conveyor (CCCII) that has a wide tunable intrinsic resistance ([Formula: see text]. The designed structure is achieved by the combination of one ordinary CCCII, one cross-coupled OTA and one active resistor. An inverse relationship between the intrinsic resistance and external bias current is created for the first time in CMOS CCCII design, which results in wide tuning range of [Formula: see text]. Performance of the proposed circuit is discussed by detailed analysis. The CMOS CCCII is simulated in TSMC 0.18[Formula: see text][Formula: see text]m RF CMOS technology. The simulation results confirm that the proposed CMOS CCCII achieves a wide tunable [Formula: see text] (from 197.4[Formula: see text][Formula: see text] to 27.23[Formula: see text]k[Formula: see text]) while maintaining favorable performance in bandwidth, transfer gain and linear range. In addition, a new reconfigurable structure, which can function as a universal filter or a quadrature oscillator via controlling an enabled switch, is given as an application example to validate the feasibility of the proposed CMOS CCCII.


Electronics ◽  
2021 ◽  
Vol 10 (18) ◽  
pp. 2303
Author(s):  
Leila Safari ◽  
Gianluca Barile ◽  
Vincenzo Stornelli ◽  
Shahram Minaei ◽  
Giuseppe Ferri

In this paper, the implementation of a low-voltage class AB second generation voltage conveyor (VCII) with high current drive capability is presented. Simple realization and good overall performance are the main features of the proposed circuit. Proper solutions and techniques were used to achieve high signal swing and high linearity at Y, X and Z ports of VCII as well as low-voltage operation. The operation of the proposed VCII was verified through SPICE simulations based on TSMC 0.18 µm CMOS technology parameters and a supply voltage of ±0.9 V. The small signal impedance values were 973 Ω, 120 kΩ and 217 Ω at Y, X and Z ports, respectively. The maximum current at the X port was ±10 mA with maximum total harmonic distortion (THD) of 2.4% at a frequency of 1 MHz. Considering a bias current (IB) of 29 µA and output current at the X port (IX) of 10 mA, the current drive capability (IX/IB) of about 345 was achieved at the X port. The voltage swing at the Z port was (−0.4, 0.4) V. The THD value at the Z port for an input signal with 0.8 V peak-to-peak value and frequency of 1 MHz was 3.9%. The total power consumption was 0.393 µW.


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