A Dynamic Failure Analysis Methodology for Fault Diagnosis of Fatigue Cracks of Subsea Wellhead Connectors with Material Aging

Author(s):  
Yingying Wang ◽  
Zhihuang Chen ◽  
Qing Yan ◽  
Yangdong Hu ◽  
Cong Wang ◽  
...  
Author(s):  
Bhanu Sood ◽  
Lucas Severn ◽  
Michael Osterman ◽  
Michael Pecht ◽  
Anton Bougaev ◽  
...  

Abstract A review of the prevalent degradation mechanisms in Lithium ion batteries is presented. Degradation and eventual failure in lithium-ion batteries can occur for a variety of dfferent reasons. Degradation in storage occurs primarily due to the self-discharge mechanisms, and is accelerated during storage at elevated temperatures. The degradation and failure during use conditions is generally accelerated due to the transient power requirements, the high frequency of charge/discharge cycles and differences between the state-of-charge and the depth of discharge influence the degradation and failure process. A step-by-step methodology for conducting a failure analysis of Lithion batteries is presented. The failure analysis methodology is illustrated using a decision-tree approach, which enables the user to evaluate and select the most appropriate techniques based on the observed battery characteristics. The techniques start with non-destructive and non-intrusive steps and shift to those that are more destructive and analytical in nature as information about the battery state is gained through a set of measurements and experimental techniques.


Author(s):  
Chuan Zhang ◽  
Yinzhe Ma ◽  
Gregory Dabney ◽  
Oh Chong Khiam ◽  
Esther P.Y. Chen

Abstract Soft failures are among the most challenging yield detractors. They typically show test parameter sensitive characteristics, which would pass under certain test conditions but fail under other conditions. Conductive-atomic force microscopy (CAFM) emerged as an ideal solution for soft failure analysis that can balance the time and thoroughness. By inserting CAFM into the soft failure analysis flow, success rate of such type of analysis can be significantly enhanced. In this paper, a logic chain soft failure and a SRAM local bitline soft failure are used as examples to illustrate how this failure analysis methodology provides a powerful and efficient solution for soft failure analysis.


Author(s):  
Rommel Estores ◽  
Pascal Vercruysse ◽  
Karl Villareal ◽  
Eric Barbian ◽  
Ralph Sanchez ◽  
...  

Abstract The failure analysis community working on highly integrated mixed signal circuitry is entering an era where simultaneously System-On-Chip technologies, denser metallization schemes, on-chip dissipation techniques and intelligent packages are being introduced. These innovations bring a great deal of defect accessibility challenges to the failure analyst. To contend in this era while aiming for higher efficiency and effectiveness, the failure analysis environment must undergo a disruptive evolution. The success or failure of an analysis will be determined by the careful selection of tools, data and techniques in the applied analysis flow. A comprehensive approach is required where hardware, software, data analysis, traditional FA techniques and expertise are complementary combined [1]. This document demonstrates this through the incorporation of advanced scan diagnosis methods in the overall analysis flow for digital functionality failures and supporting the enhanced failure analysis methodology. For the testing and diagnosis of the presented cases, compact but powerful scan test FA Lab hardware with its diagnosis software was used [2]. It can therefore easily be combined with the traditional FA techniques to provide stimulus for dynamic fault localizations [3]. The system combines scan chain information, failure data and layout information into one viewing environment which provides real analysis power for the failure analyst. Comprehensive data analysis is performed to identify failing cells/nets, provide a better overview of the failure and the interactions to isolate the fault further to a smaller area, or to analyze subtle behavior patterns to find and rationalize possible faults that are otherwise not detected. Three sample cases will be discussed in this document to demonstrate specific strengths and advantages of this enhanced FA methodology.


Author(s):  
Kristopher D. Staller ◽  
Corey Goodrich

Abstract Soft Defect Localization (SDL) is a dynamic laser-based failure analysis technique that can detect circuit upsets (or cause a malfunctioning circuit to recover) by generation of localized heat or photons from a rastered laser beam. SDL is the third and seldom used method on the LSM tool. Most failure analysis LSM sessions use the endo-thermic mode (TIVA, XIVA, OBIRCH), followed by the photo-injection mode (LIVA) to isolate most of their failures. SDL is seldom used or attempted, unless there is a unique and obvious failure mode that can benefit from the application. Many failure analysts, with a creative approach to the analysis, can employ SDL. They will benefit by rapidly finding the location of the failure mechanism and forgoing weeks of nodal probing and isolation. This paper will cover circuit signal conditioning to allow for fast dynamic failure isolation using an LSM for laser stimulation. Discussions of several cases will demonstrate how the laser can be employed for triggering across a pass/fail boundary as defined by voltage levels, supply currents, signal frequency, or digital flags. A technique for manual input of the LSM trigger is also discussed.


Author(s):  
Chris Schuermyer ◽  
Brady Benware ◽  
Graham Rhodes ◽  
Davide Appello ◽  
Vincenzo Tancorre ◽  
...  

Abstract This work presents the first application of a diagnosis driven approach for identifying systematic chain fail defects in order to reduce the time spent in failure analysis. The zonal analysis methodology that is applied separates devices into systematic and random populations of chain fails in order to prevent submitting random defects for failure analysis. Two silicon case studies are presented to validate the production worthiness of diagnosis driven yield analysis for chain fails. The defects uncovered in these case studies are very subtle and would be difficult to identify with any other methodology.


Author(s):  
Gil Garteiz

Abstract Designing devices for failure analisys (FA) is becoming increasingly critical as structure geometries and killer defects rapidly decrease in size. Naturally, devices that are designed for FA are much easier to analyze and have a higher FA success rate than those that are not. Several analyses of functional failures in a 0.18um CMOS SRAM are presented in this paper to demonstrate “Design For FA” usefulness and application. Physical analysis methodology is also discussed.


Author(s):  
Dan Bodoh ◽  
Anthony Blakely ◽  
Terry Garyet

Abstract Since failure analysis (FA) tools originated in the design-for-test (DFT) realm, most have abstractions that reflect a designer's viewpoint. These abstractions prevent easy application of diagnosis results in the physical world of the FA lab. This article presents a fault diagnosis system, DFS/FA, which bridges the DFT and FA worlds. First, it describes the motivation for building DFS/FA and how it is an improvement over off-the-shelf tools and explains the DFS/FA building blocks on which the diagnosis tool depends. The article then discusses the diagnosis algorithm in detail and provides an overview of some of the supporting tools that make DFS/FA a complete solution for FA. It also presents a FA example where DFS/FA has been applied. The example demonstrates how the consideration of physical proximity improves the accuracy without sacrificing precision.


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