Short gate-length InAlAs/InGaAs MODFETs with asymmetry gate-recess grooves: electrochemical fabrication and performance

1999 ◽  
Vol 43 (8) ◽  
pp. 1527-1533 ◽  
Author(s):  
D Xu ◽  
T Suemitsu ◽  
H Yokoyama ◽  
Y Umeda ◽  
Y Yamane ◽  
...  
2007 ◽  
Vol 17 (03) ◽  
pp. 501-508
Author(s):  
SCOTT ROY ◽  
BINJIE CHENG ◽  
ASEN ASENOV

Device parameter fluctuations, which arise from both the stochastic nature of the manufacturing process and more fundamentally from the intrinsic discreteness of charge and matter, are a dominant source of device mismatch in nano-CMOS devices, and a bottleneck to the future yield and performance of circuits and systems. The impact of such parameter fluctuations is investigated for circuits — with a specific exemplar of 6-T SRAM — whose devices scale from 35 nm gate length. We posit a change in design approach to include the use of statistical compact models as a starting point for the development of cell libraries containing fluctuation information necessary for design under the constraints of parameter fluctuations, and novel Technology Aided System Design tools.


Vacuum ◽  
2001 ◽  
Vol 61 (2-4) ◽  
pp. 323-327 ◽  
Author(s):  
T Lalinský ◽  
J Škriniarová ◽  
J Kuzmı́k ◽  
S Hasenöhrl ◽  
A Fox ◽  
...  
Keyword(s):  

1990 ◽  
Vol 34 (4) ◽  
pp. 452-465 ◽  
Author(s):  
G. A. Sai-Halasz ◽  
M. R. Wordeman ◽  
D. P. Kern ◽  
S. A. Rishton ◽  
E. Ganin ◽  
...  

Author(s):  
M. Samnouni ◽  
N. Wichmann ◽  
X. Wallart ◽  
C. Coinon ◽  
S. Lepilliet ◽  
...  
Keyword(s):  

1993 ◽  
Vol 6 (4) ◽  
pp. 380-383
Author(s):  
L. Larson ◽  
L. Jelloian ◽  
S. Rosenbaum ◽  
A. Schmitz ◽  
M. Thompson ◽  
...  
Keyword(s):  

1994 ◽  
Vol 08 (16) ◽  
pp. 2221-2243
Author(s):  
F. REN

Process technologies for self-aligned AlGaAs/GaAs and InGaP/GaAs heterojunction bipolar transistors (HBTs) as well as gate definition and dry etching fabrication schemes for submicron gate length AlGaAs/GaAs-based field effect transistors (FETs) are presented. Multiple energy F + and H + ions were used to isolate the active devices for HBTs. The resistance of test wafers at 200° C showed no change over periods of more than 50 days. Highly selective dry and wet etch techniques for InGaP/GaAs and AlGaAs/GaAs material systems were used to uniformly expose heterojunctions. Reliability of the alloyed ohmic contact and feasibility of the nonalloyed ohmic contact metallizations for both p and n type GaAs layers will be discussed. The reproducible gate recess etching is one of the critical steps for AlGaAs/GaAs-based FETs. The etching selectivity, damage, pre- and post-clean procedures were studied in terms of device performance. A simple low temperature SiN x deposition and an etch-back process with optical stepper were used to demonstrate 0.1 µm Y-shape gate feature.


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