Improved device performance of recessed-gate AlGaN/GaN HEMTs using by in-situ N2O radical treatment

In this work, the N2O radicals in-situ treatment on gate region has been employed to improve device performance of recessed-gate AlGaN/GaN high-electron-mobility transistors (HEMTs). The samples after gate recess etching were treated by N2O radicals without physical bombardment. After in-situ treatment (IST) processing, the gate leakage currents decreased by more than one order of magnitude compared to the sample without IST. The fabricated HEMTs with the IST process show a low reverse gate current of 10-9 A/mm, high on/off current ratio of 108, and high fT×Lg of 13.44 GHz·μm. A transmission electron microscope (TEM) imaging illustrates an oxide layer with a thickness of 1.8 nm exists at the AlGaN surface. X-ray photoelectron spectroscopy (XPS) measurement shows that the content of the Al-O and Ga-O bonds elevated after IST, indicating that the Al-N and Ga-N bonds on the AlGaN surface were broken and meanwhile the Al-O and Ga-O bonds formed. The oxide formed by a chemical reaction between radicals and the surface of the AlGaN barrier layer is responsible for improved device characteristics.

Impact of Gate Offset in Gate Recess on DC and RF Performance of InAlAs/InGaAs InP-based HEMTs

In this work, a set of 100-nm gate-length InP-based HEMTs were designed and fabricated with different gate offsets in gate recess. A novel technology was proposed for independent definition of gate recess and T-shaped gate by electron beam lithography. DC and RF measurement was conducted. With the gate offset varying from drain side to source side, the maximum drain current (Ids,max) and transconductance (gm,max) increased. In the meantime, f T decreased while f max increased, and the highest f max of 1096 GHz was obtained. It can be explained by the increase of gate-source capacitance and the decrease of gate-drain capacitance and source resistance. Output conductance was also suppressed by gate offset toward source side. This provides simple and flexible device parameter selection for HEMTs of different usage.

Study on positive threshold voltage shift and DC characteristics of HEMTs using gate recess technique

In the present study, AlGaN/GaN high-electron-mobility transistors (HEMTs) were fabricated through metal–organic chemical vapor deposition. Gate recess etching, combined with inductively coupled plasma reactive ion etching, was adopted, and etching time was controlled to manipulate the threshold voltage [Formula: see text]. The DC characteristics of devices etched for 0–25 s were investigated. [Formula: see text] exhibited a 1.9-V positive shift in the device with the AlGaN layer etched for 25 s. The effect of an AlN buffer layer on the [Formula: see text] shift was also investigated. The [Formula: see text] of the HEMT etched for 25 s and without an AlN buffer layer exhibited a positive shift of 3.1 V.

Simulation of β - Ga2O3 based MOSFETs for Depletion and Enhancement Mode Operation

This paper reports on TCAD-simulation of beta-gallium oxide ( β - Ga 2 O 3 ) MOSFET with the channel recessed into a 1 µ m thick Si-doped (1 × 10 18 cm - 3) epitaxial layer. We optimized gate recess thickness to achieve both, depletion and enhancement mode operation. The simulated β - Ga2O3 MOSFET structures show optimum depletion-mode and enhancement-mode characteristics for 150 nm and 15 nm active channel thickness, respectively. A comparative study is also done to analyze the thermal and electrical effects by simulating hetero-epitaxial β - Ga 2O3 layer on sapphire substrate and homoepitaxial β - Ga2O3 layer on β - Ga 2 O 3 substrate. MOSFET devices based on β - Ga 2 O 3 layers on sapphire substrates show improved performance compared to devices based on β - Ga2O3 layers on β - Ga 2 O 3 substrates in terms of drain current, trans-conductance and breakdown voltage. β - Ga 2 O 3 epitaxial layers on sapphire substrates exhibit a drain current density of 77.7 mA/mm with a peak trans-conductance of 2.28 mS/mm for D-mode operation and 27.3 mA/mm drain current density with a peak trans-conductance of 3.92 mS/mm for E-mode operation. In contrast, MOSFET devices based on β - Ga 2 O 3 epitaxial layers on β - Ga 2 O 3 substrates show a drain current density of 64.1 mA/mm for D-mode operation and 22.2 mA/mm drain current density with 3.2 mS/mm peak trans-conductance for E-mode operation. MOSFET devices based on β - Ga 2 O 3 epitaxial structures on sapphire and on β - Ga 2 O 3 substrates show reliable switching properties with sub-threshold swing of 95.98 mV/dec and 87.05 mV/dec respectively as well as a high I on =I off ratio of 10 11 . These simulation results show potential of laterally scaled β - Ga 2 O 3 MOSFETs for power switching applications.

High-Performance AlGaN/GaN Enhancement-Mode High Electron Mobility Transistor by Two-Step Gate Recess and Electroless-Plating Approaches

In this work, an AlGaN/GaN enhancement-mode high electron mobility transistor (HEMT) with two-step gate recess and electroless plating (EP) approaches is reported. Scanning electron microscopy and atomic force microscopy surface analysis are used to analysis the related properties of the EP-gate structure. A positive threshold voltage Vthof 0.68 V is obtained for the enhancement-mode EP-HEMT. In addition, a traditional HEMT based on thermal-evaporation gate is compared for the demonstration of the studied EP-HEMT with the improved performance, such as a higher maximum drain saturation current of 228.9 mA/mm, a higher maximum transconductance of 107.2 mS/mm, a lower gate leakage current of 1.2 × 10–7 mA/mm, and a higher ON/OFF drain current ratio of 4.57 × 105.