An analytical model for turn-on characteristics of short channel polycrystalline-silicon thin-film transistor for circuit simulation

2000 ◽  
Vol 54 (3-4) ◽  
pp. 263-275 ◽  
Author(s):  
Sonia Chopra ◽  
R.S. Gupta
1998 ◽  
Vol 508 ◽  
Author(s):  
P. Mei ◽  
J. B. Boyce ◽  
D. K. Fork ◽  
G. Anderson ◽  
J. Ho ◽  
...  

AbstractDistinct features of amorphous and polycrystalline silicon are attractive for large-area electronics. These features can be utilized in a hybrid structure which consists of both amorphous and polycrystalline silicon materials. For example, an extension of active matrix technology is the integration of peripheral drivers for the improvement of reliability, cost reduction and compactness of the packaging for large-area electronics. This goal can be approached by a combination of amorphous silicon pixel switches and polysilicon drivers. A monolithic fabrication process has been developed based on a simple modification of the amorphous silicon transistor process which uses selective area laser crystallization. This approach allows us to share many of the process steps involved in making both the amorphous and polysilicon devices. Another example of the hybrid device structure is a self-aligned amorphous silicon thin film transistor with polysilicon source and drain contacts. The advantages of the self-aligned transistor are reduction of the parasitic capacitance and scaling down of the device dimension. With a selective laser doping technique, self-aligned and short-channel amorphous silicon thin film transistors have been demonstrated.


2010 ◽  
Vol 49 (3) ◽  
pp. 03CA04 ◽  
Author(s):  
Sung-Hwan Choi ◽  
Sun-Jae Kim ◽  
Yeon-Gon Mo ◽  
Hye-Dong Kim ◽  
Min-Koo Han

1991 ◽  
Vol 219 ◽  
Author(s):  
Hong S. Choi ◽  
Jin S. Park ◽  
Chang H. Oh ◽  
In S. Joo ◽  
Yong S. Kim ◽  
...  

ABSTRACTWe present a new analytical model of amorphous silicon thin-film transistor (a-Si TFT) suitable for circuit simulators such as SPICE. The effects of localized gap state distributions of a-Si as well as temperatures on the a-Si TFT performances have been fully considered in the presented model. The parameters used in SPICE, such as transconductance, channel-length modulation, and power factor of source-drain current, are evaluated from the measured current-voltage and capacitance-voltage characteristics by employing the proposed extraction method. It has been found out that the analytical model is in good agreement with experimental data at both room temperature and elevated temperature and successfully implemented in a widely used circuit simulator.


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