Room temperature carbon and oxygen determination in single-crystal silicon

1980 ◽  
Vol 52 (1) ◽  
pp. 92-96 ◽  
Author(s):  
D. Warren. Vidrine
1987 ◽  
Vol 107 ◽  
Author(s):  
P. Madakson ◽  
G.J. Clark ◽  
F.K. Legoues ◽  
F.M. d'Heurle ◽  
J.E.E. Baglin

Buried TiSi2 layers, about 600Å thick and 900Å below the surface, were formed in < 111> silicon by ion implantation. The implantation was done with either 120 or 170 keV Ti+ to doses ranging from 5 x 1016 to 2 x 1017 ions/cm2, and at temperatures of between ambient and 650° C. Annealing was done at 600° C, 700°C and 1000°C. Continuous buried layers were achieved only with samples implanted with doses equal or greater than 1017 ions/cm2 and at temperatures above 450°C. Below this dose TiSi2, was present only as discrete precipitates. For room temperature implants, the TiSi2, layer is formed on the surface. The damage present consists of dispersed TiSi6 precipitates and microtwins.


1997 ◽  
Vol 490 ◽  
Author(s):  
Myung-Sik Son ◽  
Ho-Jung Hwang

ABSTRACTAn alternative three-dimensional (3D) Monte Carlo (MC) dynamic simulation model for phosphorus implant into (100) single-crystal silicon has been developed which incorporates the effects of channeling and damage. This model calculates the trajectories of both implanted ions and recoiled silicons and concurrently and explicitly affects both ions and recoils due to the presence of accumulative damage. In addition, the model for room-temperature implant accounts for the self-annealing effect using our defined recombination probabilities for vacancies and interstitials saved on the unit volumes. Our model has been verified by the comparison with the previously published SIMS data over commonly used energy range between 10 and 180 keV, using our proposed empirical electronic energy loss model. The 3D formations of the amorphous region and the ultra-shallow junction around the implanted region could be predicted by using our model, TRICSI (TRansport Ions into Crystal-Silicon).


2008 ◽  
Vol 1080 ◽  
Author(s):  
Ataur Sarkar ◽  
M. Saif Islam ◽  
Sungsoo Yi ◽  
A. Alec Talin

ABSTRACTRoom temperature photoelectrical characterization with 325-nm ultraviolet and 633-nm visible laser excitations is performed on lateral p-type InP nanowires bridged between vertically oriented heavily p-doped single crystal silicon electrodes. Experimental results under 5 V bias demonstrate persistent photoconductivity through a slow decay of excess photocurrent with relaxation times ∼110 s and ∼50 s for the UV and visible laser illuminations, respectively. Persistent photocurrent originates from the long recombination time due to carrier trapping in vacancies, defect centers, and surface states in the InP nanowires. The study opens a new understanding of trap physics of nanowire heterostructures, a critical investigation for applications of these materials in photonic devices.


2020 ◽  
Vol 55 (17) ◽  
pp. 7359-7372 ◽  
Author(s):  
Hiroshi Yamaguchi ◽  
Junichi Tatami ◽  
Tsukaho Yahagi ◽  
Hiromi Nakano ◽  
Motoyuki Iijima ◽  
...  

Author(s):  
M. H. Rhee ◽  
W. A. Coghlan

Silicon is believed to be an almost perfectly brittle material with cleavage occurring on {111} planes. In such a material at room temperature cleavage is expected to occur prior to any dislocation nucleation. This behavior suggests that cleavage fracture may be used to produce usable flat surfaces. Attempts to show this have failed. Such fractures produced in semiconductor silicon tend to occur on planes of variable orientation resulting in surfaces with a poor surface finish. In order to learn more about the mechanisms involved in fracture of silicon we began a HREM study of hardness indent induced fractures in thin samples of oxidized silicon.Samples of single crystal silicon were oxidized in air for 100 hours at 1000°C. Two pieces of this material were glued together and 500 μm thick cross-section samples were cut from the combined piece. The cross-section samples were indented using a Vicker's microhardness tester to produce cracks. The cracks in the samples were preserved by thinning from the back side using a combination of mechanical grinding and ion milling.


Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.


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