Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

1981 ◽  
Vol 7 ◽  
Author(s):  
R.F. Pinizzotto ◽  
B.L. Vaandrager ◽  
H.W. Lam

ABSTRACTCross-sectional and plan view transmission electron microscopy and high resolution scanning electron microscopy have been used to characterize the microstructure of silicon-on-insulator formed by high dose oxygen ion implantation. The complete microstructure was observed to be composed of a series of distinct zones. The top silicon layer was {100} single crystal with a very low dislocation density. The second layer was a mixture of fine grained polysilicon and amorphous SiO2. The third layer was pure SiO2 , followed by a second mixed layer. Finally, there was a layer of {100} silicon with an extremely high dislocation density. Some of the dislocations extended as far as 1 μm into the Si substrate. The relative widths of the layers were found to depend on the total ion fluence. The oxide layer did not occur for low doses and the two mixed layers merged into one zone. At high doses, the silicon-silicon dioxide interfaces are abrupt due to internal oxidation.


Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1118
Author(s):  
Yuan Tian ◽  
Yi Liu ◽  
Yang Wang ◽  
Jia Xu ◽  
Xiaomei Yu

In this paper, a polyimide (PI)/Si/SiO2-based piezoresistive microcantilever biosensor was developed to achieve a trace level detection for aflatoxin B1. To take advantage of both the high piezoresistance coefficient of single-crystal silicon and the small spring constant of PI, the flexible piezoresistive microcantilever was designed using the buried oxide (BOX) layer of a silicon-on-insulator (SOI) wafer as a bottom passivation layer, the topmost single-crystal silicon layer as a piezoresistor layer, and a thin PI film as a top passivation layer. To obtain higher sensitivity and output voltage stability, four identical piezoresistors, two of which were located in the substrate and two integrated in the microcantilevers, were composed of a quarter-bridge configuration wheatstone bridge. The fabricated PI/Si/SiO2 microcantilever showed good mechanical properties with a spring constant of 21.31 nN/μm and a deflection sensitivity of 3.54 × 10−7 nm−1. The microcantilever biosensor also showed a stable voltage output in the Phosphate Buffered Saline (PBS) buffer with a fluctuation less than 1 μV @ 3 V. By functionalizing anti-aflatoxin B1 on the sensing piezoresistive microcantilever with a biotin avidin system (BAS), a linear aflatoxin B1 detection concentration resulting from 1 ng/mL to 100 ng/mL was obtained, and the toxic molecule detection also showed good specificity. The experimental results indicate that the PI/Si/SiO2 flexible piezoresistive microcantilever biosensor has excellent abilities in trace-level and specific detections of aflatoxin B1 and other biomolecules.


Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi ◽  
K. E. Goodson

Simulations of the temperature field in Silicon-on-Insulator (SOI) and strained-Si transistors can benefit from experimental data and modeling of the thin silicon layer thermal conductivity at high temperatures. This work presents the first experimental data for 20 and 100 nm thick single crystal silicon layers at high temperatures and develops algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering for pure and doped silicon layers. The model applies to temperatures range 300–1000 K for silicon layer thicknesses from 10 nm to 1 μm (and even bulk) and agrees well with the experimental data. In addition, the model has an excellent agreement with the predictions of thin film thermal conductivity based on thermal conductivity integral and Boltzmann transport equation, although it is significantly more robust and convenient for integration into device simulators. The experimental data and predictions are required for accurate thermal simulation of the semiconductor devices, nanostructures and in particular the SOI and strained-Si transistors.


1985 ◽  
Vol 53 ◽  
Author(s):  
C. Slawinski ◽  
B.-Y. Mao ◽  
P.-H. Chang ◽  
H.W. Lam ◽  
J.A. Keenan

ABSTRACTBuried nitride silicon-on-insulator (SOI) structures have been fabricated using the technique of nitrogen ion implantation. The crystallinity of the top silicon film was found to be exceptionally good. The minimum channeling yield, Xmin' was better than 3%. This is comparable to the value observed for single crystal silicon. The buried insulator formed during the anneals has been identified as polycrystalline α-Si3 N4 with numerous silicon inclusions. This nitride, however, has been found to remain amorphous in regions at the center of the implant where the nitrogen concentration exceeds the stoichiometric level of Si3N4. Nitrogen donor formation in the top silicon layer has also been observed.


1990 ◽  
Vol 182 ◽  
Author(s):  
B. Raicu ◽  
M.I. Current ◽  
W.A. Keenan ◽  
D. Mordo ◽  
R. Brennan ◽  
...  

AbstractHighly conductive p+-polysilicon films were fabricated over Si(100) and SiO2 surfaces using high-dose ion implantation and rapid thermal annealing. Resistivities close to that of single crystal silicon were achieved. These films were characterized by a variety of electrical and optical techniques as well as SIMS and cross-section TEM.


2005 ◽  
Vol 128 (1) ◽  
pp. 75-83 ◽  
Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi

Self-heating in deep submicron transistors (e.g., silicon-on-insulator and strained-Si) and thermal engineering of many nanoscale devices such as nanocalorimeters and high-density thermomechanical data storage are strongly influenced by thermal conduction in ultra-thin silicon layers. The lateral thermal conductivity of single-crystal silicon layers of thicknesses 20 and 100nm at temperatures between 30 and 450K are measured using joule heating and electrical-resistance thermometry in suspended microfabricated structures. In general, a large reduction in thermal conductivity resulting from phonon-boundary scattering is observed. Thermal conductivity of the 20nm thick silicon layer at room temperature is nearly 22Wm−1K−1, compared to the bulk value, 148Wm−1K−1. The predictions of the classical thermal conductivity theory that accounts for the reduced phonon mean free paths based on a solution of the Boltzmann transport equation along a layer agrees well with the experimental results.


1985 ◽  
Vol 53 ◽  
Author(s):  
Hon Wai Lam

ABSTRACTThe top silicon layer in as-implanted SIMOX wafer is usually too thin to support device fabrication. Hence, an epitaxial layer is usually grown on a SIMOX wafer after oxygen ion implantation and anneal. Because this epitaxial layer is typically very thin,less than 500 nm) and because of the material structure of the S1MOX wafer, special care has to.be exercised in order to obtain desirable epitaxial growth. This paper describes the unique problems of epitaxial growth on SIMOX.


Author(s):  
A. K. Datye ◽  
S. S. Tsao ◽  
D. R. Myers

High fluence ion implantation of nitrogen ions in silicon is currently of great interest in the formation of silicon on insulator (SOI) structures. After ion implantation, the single crystal silicon water usually exhibits a highly defective surface layer followed by an amorphous layer corresponding to the peak of the nitrogen implant profile. Annealing the sample at ∽ 1200 C yields a buried layer of silicon nitride underneath a top layer of single crystal silicon. The Quality of the single crystal silicon, buried nitride and the silicon/silicon nitride interface is of paramount importance from the standpoint of device design. We have used high resolution cross section TEM to examine the Si/nitride interface and the buried nitride layer.


Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi

Self-heating in deep submicron transistors (e.g., Silicon-on-insulator and strained-Si) and thermal engineering of many nanoscale devices such as nanocalorimeters and high-density thermomechanical data storage are strongly influenced by thermal conduction in ultra-thin silicon layers. The lateral thermal conductivity of single-crystal silicon layers of thicknesses 20 and 100 nm at temperatures between 30 and 300 K was measured using Joule heating and electrical-resistance thermometry in suspended microfabricated structures. In general, a large reduction in thermal conductivity resulting from phonon-boundary scattering, particularly at low temperatures, is observed. Thermal conductivity of the 20 nm thick silicon layer at room temperature is nearly 22 W m−1K−1, compared to the bulk value, 148 W m−1K−1. The predictions of the classical thermal conductivity theory that accounts for the reduced phonon mean free paths based on a solution of the Boltzmann transport equation along a layer agrees well with the experimental results.


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