scholarly journals Interfacial engineering of metal-insulator-semiconductor junctions for efficient and stable photoelectrochemical water oxidation

2017 ◽  
Vol 8 (1) ◽  
Author(s):  
Ibadillah A. Digdaya ◽  
Gede W. P. Adhyaksa ◽  
Bartek J. Trześniewski ◽  
Erik C. Garnett ◽  
Wilson A. Smith

Author(s):  
Prangya P. Sahoo ◽  
Miroslav Mikolášek ◽  
Kristína Hušeková ◽  
Edmund Dobročka ◽  
Ján Šoltýs ◽  
...  




2020 ◽  
Vol 13 (1) ◽  
pp. 221-228 ◽  
Author(s):  
Bin Liu ◽  
Shijia Feng ◽  
Lifei Yang ◽  
Chengcheng Li ◽  
Zhibin Luo ◽  
...  

This paper describes a bifacial passivation strategy for the metal/Si interface of metal–insulator–semiconductor (MIS) photoelectrodes, achieving record high activities for water oxidation and reduction for Si-based MIS electrodes.



2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Soonil Lee ◽  
Li Ji ◽  
Alex C. De Palma ◽  
Edward T. Yu

AbstractMetal-insulator-semiconductor (MIS) structures are widely used in Si-based solar water-splitting photoelectrodes to protect the Si layer from corrosion. Typically, there is a tradeoff between efficiency and stability when optimizing insulator thickness. Moreover, lithographic patterning is often required for fabricating MIS photoelectrodes. In this study, we demonstrate improved Si-based MIS photoanodes with thick insulating layers fabricated using thin-film reactions to create localized conduction paths through the insulator and electrodeposition to form metal catalyst islands. These fabrication approaches are low-cost and highly scalable, and yield MIS photoanodes with low onset potential, high saturation current density, and excellent stability. By combining this approach with a p+n-Si buried junction, further improved oxygen evolution reaction (OER) performance is achieved with an onset potential of 0.7 V versus reversible hydrogen electrode (RHE) and saturation current density of 32 mA/cm2 under simulated AM1.5G illumination. Moreover, in stability testing in 1 M KOH aqueous solution, a constant photocurrent density of ~22 mA/cm2 is maintained at 1.3 V versus RHE for 7 days.



Nanoscale ◽  
2018 ◽  
Vol 10 (29) ◽  
pp. 14290-14297 ◽  
Author(s):  
Chuanping Li ◽  
Ping Wang ◽  
Haijuan Li ◽  
Minmin Wang ◽  
Jie Zhang ◽  
...  

The crucial role of interfacial engineering in plasmon-driven water splitting enhancement is revealed on α-Fe2O3–Au@SiO2 heterostructured photoanodes.



2021 ◽  
Vol 72 (3) ◽  
pp. 203-207
Author(s):  
Miroslav Mikolášek ◽  
Karol Fröhlich ◽  
Kristína Hušeková ◽  
Peter Ondrejka ◽  
Filip Chymo ◽  
...  

Abstract This paper is dedicated to preparation and analysis of metal insulator semiconductor (MIS) photoanode with a metal organic chemical vapor deposited RuO2 layer and TiO2 protection layer for photoelectrochemical water splitting. It is shown that utilization of TiO2 layers of 2, 4, and 6 nm thickness preserve the catalytic activity of underlying RuO2. The origin of increased overpotential and decreased photovoltage of the photoanode upon the increase of TiO2 layer thickness is discussed in the paper. Results revealed that utilization of TiO2 layer in the MIS concept is suitable for photoelectrochemical water oxidation applications.



2020 ◽  
Vol 49 (3) ◽  
pp. 588-592 ◽  
Author(s):  
Fusheng Li ◽  
Ziqi Zhao ◽  
Hao Yang ◽  
Dinghua Zhou ◽  
Yilong Zhao ◽  
...  

A cobalt oxide catalyst prepared by a flame-assisted deposition method on the surface of FTO and hematite for electrochemical and photoelectrochemical water oxidation, respectively.





2017 ◽  
Author(s):  
Varun Bheemireddy

The two-dimensional(2D) materials are highly promising candidates to realise elegant and e cient transistor. In the present letter, we conjecture a novel co-planar metal-insulator-semiconductor(MIS) device(capacitor) completely based on lateral 2D materials architecture and perform numerical study of the capacitor with a particular emphasis on its di erences with the conventional 3D MIS electrostatics. The space-charge density features a long charge-tail extending into the bulk of the semiconductor as opposed to the rapid decay in 3D capacitor. Equivalently, total space-charge and semiconductor capacitance densities are atleast an order of magnitude more in 2D semiconductor. In contrast to the bulk capacitor, expansion of maximum depletion width in 2D semiconductor is observed with increasing doping concentration due to lower electrostatic screening. The heuristic approach of performance analysis(2D vs 3D) for digital-logic transistor suggest higher ON-OFF current ratio in the long-channel limit even without third dimension and considerable room to maximise the performance of short-channel transistor. The present results could potentially trigger the exploration of new family of co-planar at transistors that could play a signi significant role in the future low-power and/or high performance electronics.<br>



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