Electrical properties of oxide‐nitride dielectric films incorporating passivation oxide on polycrystalline silicon for advanced dynamic random access memory stacked capacitors

1992 ◽  
Vol 60 (21) ◽  
pp. 2645-2647 ◽  
Author(s):  
Hiang C. Chan ◽  
Viju K. Mathews ◽  
Pierre C. Fazan
2001 ◽  
Vol 679 ◽  
Author(s):  
Jonas Berg ◽  
Stefan Bengtsson ◽  
Per Lundgren

ABSTRACTSimulations have been made to analyze the use of molecular resonant tunneling diodes for local refresh of DRAM (Dynamic Random Access Memory) cells. Local refresh can be provided by a latch consisting of a pair of resonant tunneling diodes connected to the storage capacitor of the cell. Such a solution would significantly reduce the standby power consumption of the DRAM cell. We have compared the requirements on the resonant tunneling diodes for proper refresh operation with the electrical properties of published molecules with resonant IV-curves. The simulations show that no molecules with resonant electrical properties published so far in the literature have properties making them useful for this particular application. This is true also for low temperature operation. The issues of maximum tolerable series resistance and of maximum tolerable fluctuations in the number of attached molecules have also been addressed. Our results show that the focus for development of molecules with resonant electrical properties should be to find molecules with resonance for lower applied voltages and lower current levels than the molecules published so far. If the synthesis of new molecules with attractive properties is successful the merging of silicon technology and molecular electronics, for instance for new generations of DRAM cells, is a realistic future path of microelectronics.


2021 ◽  
Vol 21 (8) ◽  
pp. 4258-4267
Author(s):  
Hee Dae An ◽  
Min Su Cho ◽  
Hye Jin Mun ◽  
Sang Ho Lee ◽  
Jin Park ◽  
...  

In this paper, we present a capacitorless one transistor dynamic random access memory (1T-DRAM) based on a polycrystalline silicon (poly-Si) double gate MOSFET with grain boundaries (GBs). Several studies have been conducted to implement 1T-DRAM using poly-Si. This is because poly-Si has the advantage of low-cost fabrication and can be stacked. However, poly-Si has GBs, which can adversely affect semiconductor device. So far, related studies on poly-Si-based 1T-DRAM have only focused on GBs present in the channel domain. Hence, in this study, we analyzed the transfer and memory characteristics when a GB is present in the source and drain regions. As a result, we found that in the center of the depletion region in the source and channel junction, where the effect of GB was most significant, sensing margins decreased the most from 0.88 to 0.29 μA/μm, and retention time (RT) decreased from 85 ms to 47 μs. In addition, we found that at the center of the depletion region in the drain and channel junction, where the effect of GBs was most significant in the drain region, RT decreased the most from 85 ms to 52 μs.


1996 ◽  
Vol 68 (6) ◽  
pp. 764-766 ◽  
Author(s):  
Su Jae Lee ◽  
Chae Ryong Cho ◽  
Min Soo Kang ◽  
Min Su Jang ◽  
Kwang Yong Kang

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