Leakage Current Reduction of Chemical-Vapor-Deposited Ta2O5Films on Rugged Polycrystalline Silicon Electrode for Dynamic Random Access Memory Application

1999 ◽  
Vol 38 (Part 1, No. 4A) ◽  
pp. 1927-1931 ◽  
Author(s):  
Mark Lin ◽  
Chun-Yen Chang ◽  
Tiao-Yuan Huang ◽  
Win-Yi Shieh
1999 ◽  
Vol 46 (5) ◽  
pp. 940-946 ◽  
Author(s):  
Daewon Ha ◽  
Changhyun Cho ◽  
Dongwon Shin ◽  
Gwan-Hyeob Koh ◽  
Tae-Young Chung ◽  
...  

2021 ◽  
Vol 21 (8) ◽  
pp. 4258-4267
Author(s):  
Hee Dae An ◽  
Min Su Cho ◽  
Hye Jin Mun ◽  
Sang Ho Lee ◽  
Jin Park ◽  
...  

In this paper, we present a capacitorless one transistor dynamic random access memory (1T-DRAM) based on a polycrystalline silicon (poly-Si) double gate MOSFET with grain boundaries (GBs). Several studies have been conducted to implement 1T-DRAM using poly-Si. This is because poly-Si has the advantage of low-cost fabrication and can be stacked. However, poly-Si has GBs, which can adversely affect semiconductor device. So far, related studies on poly-Si-based 1T-DRAM have only focused on GBs present in the channel domain. Hence, in this study, we analyzed the transfer and memory characteristics when a GB is present in the source and drain regions. As a result, we found that in the center of the depletion region in the source and channel junction, where the effect of GB was most significant, sensing margins decreased the most from 0.88 to 0.29 μA/μm, and retention time (RT) decreased from 85 ms to 47 μs. In addition, we found that at the center of the depletion region in the drain and channel junction, where the effect of GBs was most significant in the drain region, RT decreased the most from 85 ms to 52 μs.


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