Correlation between 1/fnoise and interface state density at the Fermi level in field‐effect transistors

1985 ◽  
Vol 57 (10) ◽  
pp. 4811-4813 ◽  
Author(s):  
Herman E. Maes ◽  
Sabir H. Usmani ◽  
Guido Groeseneken
Keyword(s):  
Fermi Level ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Interface State Density

Extraction of the Interface State Density of Top-Gate Graphene Field-Effect Transistors

2015 ◽  
Vol 36 (4) ◽  
pp. 408-410 ◽  
Author(s):  
Ukjin Jung ◽  
Yun Ji Kim ◽  
Yonghun Kim ◽  
Young Gon Lee ◽  
Byoung Hun Lee
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Interface State Density

Preannealing Effect on Mobility of N-/Al-Coimplanted and Over-Oxidized 4H-SiC MOSFETs

2010 ◽  
Vol 645-648 ◽  
pp. 487-490 ◽  
Author(s):  
Yuichiro Nanen ◽  
Bernd Zippelius ◽  
Svetlana Beljakowa ◽  
Lia Trapaidze ◽  
Michael Krieger ◽  
...  
Keyword(s):  
Mass Spectroscopy ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Metal Oxide Semiconductor ◽  
Interface State Density ◽  
Oxide Semiconductor ◽  
Effective Mobility ◽  
Secondary Ion

The authors investigated the effect of preannealing on N-/Al-coimplanted and over-oxidized Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). The preannealing process causes a decrease of the Hall mobility and the effective mobility, and an increase of the interface state density. Secondary ion mass spectroscopy (SIMS) measurements revealed that the N concentration at the SiO2/SiC interface in preannealed samples is lower than in not-preannealed samples, which might be the reason for in the increase of the interface state density. In MOSFETs without preannealing, more N atoms are piled up at the SiO2/SiC interface, leading to the lower interface state density and higher mobility.

Improved Inversion Channel Mobility in Si-face 4H-SiC MOSFETs by Phosphorus Incorporation Technique

2010 ◽  
Vol 1246 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Kenji Hirata ◽  
Tomoaki Hatayama ◽  
...  
Keyword(s):  
Conduction Band ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Band Edge ◽  
Conduction Band Edge ◽  
Channel Mobility ◽  
Inversion Channel

AbstractWe propose a new technique to fabricate 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) with high inversion channel mobility. P atoms were incorporated into the SiO2/4H-SiC(0001) interface by post-oxidation annealing using phosphoryl chloride (POCl3). The interface state density at 0.2 eV from the conduction band edge was reduced to less than 1 × 1011 cm−2eV−1 by the POCl3 annealing at 1000 °C. The peak field-effect mobility of 4H-SiC MOSFETs on (0001) Si-face processed with POCl3 annealing at 1000 °C was approximately 90 cm2/Vs. The high channel mobility is attributed to the reduced interface state density near the conduction band edge.

Correlation between Field Effect Mobility and Accumulation Conductance at 4H-SiC MOS Interface with Barium

2018 ◽  
Vol 924 ◽  
pp. 477-481
Author(s):  
Kosuke Muraoka ◽  
Seiji Ishikawa ◽  
Hiroshi Sezaki ◽  
Tomonori Maeda ◽  
Shinichiro Kuroki
Keyword(s):  
Linear Correlation ◽  
Field Effect ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Field Effect Mobility ◽  
Mos Capacitors

A correlation between field effect mobility and an accumulation conductance has been investigated at 4H-SiC MOS interface with barium. 4H-SiC n-channel MOSFETs and n-type MOS capacitors were fabricated with a barium-introduced SiO2and a conventional dry SiO2. The field effect mobility was enhanced by introducing the barium-introduced SiO2. It is found that there is a linear correlation between the mobility and the accumulation conductance. The MOS interface of the barium-introduced SiO2had a lower interface state density of 2×1011cm-2eV-1than that of the conventional dry SiO2.

Progress in GaN MOSFET Technology

2008 ◽  
Vol 600-603 ◽  
pp. 1263-1268 ◽  
Author(s):  
T. Paul Chow ◽  
W. Huang ◽  
T. Khan ◽  
K. Matocha ◽  
Y. Wang
Keyword(s):  
Field Effect ◽  
Interface State ◽  
Orientation Dependence ◽  
State Density ◽  
Interface State Density ◽  
Field Effect Mobility ◽  
Mos Capacitors ◽  
Enhancement Mode ◽  
Current Collapse ◽  
Non Destructive

GaN MOS capacitors were characterized to optimize the electric properties of SiO2/GaN interface. With optimized anneal conditions, an interface state density of 3.8×1010/cm2-eV was estimated at 0.19 eV near the conduction band and decreases deeper into the band gap. Enhancement-mode GaN MOSFETs were experimentally demonstrated on both p and n GaN epilayer with record high field-effect mobility of 167 cm2/V-s. Lateral RESURF-type GaN MOSFETs exhibit non-destructive high voltage (up to 940V) blocking capabilities. Other characterization including mobility orientation dependence, MOS-gated Hall mobility, current collapse and an NMOS inverter utilizing E/D mode GaN MOSFETs have also been experimentally demonstrated.

Improvement of Interface State and Channel Mobility Using 4H-SiC (0-33-8) Face

2013 ◽  
Vol 740-742 ◽  
pp. 506-509 ◽  
Author(s):  
Toru Hiyoshi ◽  
Takeyoshi Masuda ◽  
Keiji Wada ◽  
Shin Harada ◽  
Yasuo Namikawa
Keyword(s):  
Field Effect ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Mos Devices ◽  
Blocking Voltage

In this paper, we characterized MOS devices fabricated on 4H-SiC (0-33-8) face. The interface state density of SiO2/4H-SiC(0-33-8) was significantly low compared to that of SiO2/4H-SiC(0001). The field-effect channel mobility obtained from lateral MOSFET (LMOSFET) was 80 cm2/Vs, in spite of a high p-well concentration of 5x1017 cm-3 (implantation). The double implanted MOSFET (DMOSFET) fabricated on 4H-SiC(0-33-8) showed a specific on-resistance of 4.0 mΩcm2 with a blocking voltage of 890 V.

Gate Oxide Stability of 4H-SiC MOSFETs under On/Off-State Bias-Temperature Stress

2013 ◽  
Vol 740-742 ◽  
pp. 553-556 ◽  
Author(s):  
Marko J. Tadjer ◽  
Aurore Constant ◽  
Philippe Godignon ◽  
Sara Martin-Horcajo ◽  
Alberto Bosca ◽  
...  
Keyword(s):  
Field Effect Transistors ◽  
Gate Oxide ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Stable Operation ◽  
Bias Temperature Instability ◽  
Bias Temperature Stress ◽  
Bias Instability ◽  
State Stress

On- and off-state bias-temperature instability (BTI) measurements of 4H-SiC field effect transistors fabricated in a gate-oxide-first process were performed in the 30-450 °C temperature range. Stable operation under off-state stress at 300 °C is reported. On-state bias-instability stress revealed behavior consistent with the presence of hole traps in the SiC channel. The interface state density Dit increased from 2.5 eV-1cm-2 to 6.6 eV-1cm-2 as a function of positive stress duration.

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