Improvement of Interface State and Channel Mobility Using 4H-SiC (0-33-8) Face

2013 ◽  
Vol 740-742 ◽  
pp. 506-509 ◽  
Author(s):  
Toru Hiyoshi ◽  
Takeyoshi Masuda ◽  
Keiji Wada ◽  
Shin Harada ◽  
Yasuo Namikawa
Keyword(s):  
Field Effect ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Mos Devices ◽  
Blocking Voltage

In this paper, we characterized MOS devices fabricated on 4H-SiC (0-33-8) face. The interface state density of SiO2/4H-SiC(0-33-8) was significantly low compared to that of SiO2/4H-SiC(0001). The field-effect channel mobility obtained from lateral MOSFET (LMOSFET) was 80 cm2/Vs, in spite of a high p-well concentration of 5x1017 cm-3 (implantation). The double implanted MOSFET (DMOSFET) fabricated on 4H-SiC(0-33-8) showed a specific on-resistance of 4.0 mΩcm2 with a blocking voltage of 890 V.

High Channel Mobility in P-Channel MOSFETs Fabricated on 4H-SiC (0001) and Non-Basal Faces

2009 ◽  
Vol 615-617 ◽  
pp. 789-792
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Thermal Oxidation ◽  
Interface State ◽  
Original Method ◽  
State Density ◽  
Interface State Density ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Mos Devices

P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.

Effect of Post-Oxidation Annealing in Wet O2 and N2O Ambient on Thermally Grown SiO2/4H-SiC Interface for P-Channel MOS Devices

2012 ◽  
Vol 717-720 ◽  
pp. 709-712 ◽  
Author(s):  
Shuji Katakami ◽  
Manabu Arai ◽  
Kensuke Takenaka ◽  
Yoshiyuki Yonezawa ◽  
Hitoshi Ishimori ◽  
...  
Keyword(s):  
Interfacial Properties ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Promising Method ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Mos Devices ◽  
Inversion Channel ◽  
P Type

We investigated the effect of post-oxidation annealing in wet O2 and N2O ambient, following dry O2 oxidation on the SiC MOS interfacial properties by using p-type MOS capacitors. The interfacial properties were dramatically improved by the introduction of hydrogen or nitrogen atoms into the SiO2/SiC interface, in each POA process. Notably, the N2O-POA process at 1200 °C or higher reduced the interface state density more effectively than the wet-O2-POA process, and offers a promising method to further improve the inversion channel mobility of p-channel SiC MOS devices.

Improved Inversion Channel Mobility in Si-face 4H-SiC MOSFETs by Phosphorus Incorporation Technique

2010 ◽  
Vol 1246 ◽  
Author(s):  
Dai Okamoto ◽  
Hiroshi Yano ◽  
Shinya Kotake ◽  
Kenji Hirata ◽  
Tomoaki Hatayama ◽  
...  
Keyword(s):  
Conduction Band ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Band Edge ◽  
Conduction Band Edge ◽  
Channel Mobility ◽  
Inversion Channel

AbstractWe propose a new technique to fabricate 4H-SiC metal–oxide–semiconductor field-effect transistors (MOSFETs) with high inversion channel mobility. P atoms were incorporated into the SiO2/4H-SiC(0001) interface by post-oxidation annealing using phosphoryl chloride (POCl3). The interface state density at 0.2 eV from the conduction band edge was reduced to less than 1 × 1011 cm−2eV−1 by the POCl3 annealing at 1000 °C. The peak field-effect mobility of 4H-SiC MOSFETs on (0001) Si-face processed with POCl3 annealing at 1000 °C was approximately 90 cm2/Vs. The high channel mobility is attributed to the reduced interface state density near the conduction band edge.

scholarly journals Inversion channel mobility and interface state density of diamond MOSFET using N-type body with various phosphorus concentrations

2019 ◽  
Vol 114 (24) ◽  
pp. 242101 ◽  
Author(s):  
Tsubasa Matsumoto ◽  
Hiromitsu Kato ◽  
Toshiharu Makino ◽  
Masahiko Ogura ◽  
Daisuke Takeuchi ◽  
...  
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Channel Mobility ◽  
Inversion Channel

Electrical Properties of High-K LaLuO3 Gate Oxide for SOI MOSFETs

2011 ◽  
Vol 276 ◽  
pp. 87-93
Author(s):  
Y.Y. Gomeniuk ◽  
Y.V. Gomeniuk ◽  
A. Nazarov ◽  
P.K. Hurley ◽  
Karim Cherkaoui ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Gate Oxide ◽  
Interface State ◽  
Channel Length ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Threshold Voltages

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.

Analysis of Interface Trap Density and Channel Mobility in 4H-SiC NMOS Capacitors and Lateral MOSFETs

2017 ◽  
Vol 897 ◽  
pp. 115-118
Author(s):  
Martin Domeij ◽  
Jimmy Franchi ◽  
Krister Gumaelius ◽  
K. Lee ◽  
Fredrik Allerstam
Keyword(s):  
Threshold Voltage ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Trap Density ◽  
Interface Trap Density ◽  
Interface Trap ◽  
Subthreshold Slope ◽  
Gate Oxides ◽  
Channel Mobility

Lateral implanted SiC MOSFETs and NMOS capacitors were fabricated and used to extract channel mobility and interface state density DIT for three different gate oxides. DIT values were extracted using the high(1 MHz)-low(1 kHz) method for NMOS capacitors and the subthreshold slope for MOSFETs. The subthreshold slope extraction gave 6-20 times higher DIT values compared to the high-low method, presumably because the high-low method cannot capture the fastest traps [1]. None of the methods resulted in clear proportionality between the inverse channel mobility and DIT. The subthreshold slope gave similar DIT values for samples with different surface p-doping concentrations indicating that the method is not sensitive to the threshold voltage.

Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures

2008 ◽  
Vol 600-603 ◽  
pp. 679-682 ◽  
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Post Deposition Annealing ◽  
Interface Quality ◽  
Channel Mobility ◽  
Capacitance Voltage ◽  
Mis Capacitors ◽  
Post Deposition ◽  
Time Lead

Deposited SiN/SiO2 stack gate structures have been investigated to improve the 4H-SiC MOS interface quality. Capacitance-voltage measurements on fabricated SiN/SiO2 stack gate MIS capacitors have indicated that the interface state density is reduced by post-deposition annealing in N2O at 1300°C. The usage of thin SiN and increase in N2O-annealing time lead to a low interface state density of 1×1011 cm-2eV-1 at EC – 0.2 eV. Oxidation of the SiN during N2O annealing has resulted in improvement of SiC MIS interface. The fabricated SiN/SiO2 stack gate MISFETs demonstrate a high channel mobility of 32 cm2/Vs on (0001)Si face and 40 cm2/Vs on (000-1)C face.

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