Electrodeposition of Cu(111) onto a Ru(0001) seed layer for epitaxial Cu interconnects

2021 ◽  
Vol 130 (13) ◽  
pp. 135301
Author(s):  
Ryan R. Gusley ◽  
Quintin Cumston ◽  
Kevin R. Coffey ◽  
Alan C. West ◽  
Katayun Barmak
Keyword(s):  
Seed Layer ◽  
Cu Interconnects

The defect reduction of Cu interconnects by optimized Cu seed layer

2016 ◽  
Author(s):  
Shi-Jun Liu ◽  
Wei-Lin Wang ◽  
Yue-Yin Yen ◽  
Chan-Hao Hsu ◽  
Hung-Ju Chien ◽  
...  
Keyword(s):  
Seed Layer ◽  
Defect Reduction ◽  
Cu Interconnects

Cubic TaN diffusion barrier for Cu interconnects using an ultra-thin TiN seed layer

2008 ◽  
Vol 516 (15) ◽  
pp. 5103-5106 ◽  
Author(s):  
Roy A. Araujo ◽  
Jongsik Yoon ◽  
Xinghang Zhang ◽  
Haiyan Wang
Keyword(s):  
Diffusion Barrier ◽  
Seed Layer ◽  
Cu Interconnects

Characterization of barrier/seed layer stacks of Cu interconnects by electron tomographic three-dimensional object reconstruction

2003 ◽  
Vol 65 (1-2) ◽  
pp. 171-183 ◽  
Author(s):  
Heiko Stegmann ◽  
Hans-Jürgen Engelmann ◽  
Ehrenfried Zschech
Keyword(s):  
Seed Layer ◽  
Three Dimensional ◽  
Object Reconstruction ◽  
Cu Interconnects ◽  
Dimensional Object

Study of Nucleation of Electroless Cu Deposition on Pd

1996 ◽  
Vol 451 ◽  
Author(s):  
R. Amster ◽  
B. Johnson ◽  
L. S. Vanasupa
Keyword(s):  
Seed Layer ◽  
Si Substrate

ABSTRACTWe studied the nucleation of Cu deposited by an electroless bath. A Pd seed layer was sputtered onto a (100) Si substrate and analyzed with GIX, STM, and AFM. The seed layer was then placed in varying ED-Cu bath conditions and also analyzed using GIX, STM, and AFM. GIX analysis results show a (111) texture for the Pd seed layer as well as the ED-Cu layer. The seed layer's influence on the deposited Cu grain's texture was found to be inconclusive.

The Novel TEM Sample Preparation Approach for Targeted via with Barrier/Cu Seed Layer Inspection

2009 ◽  
Author(s):  
Wen-Fei Hsieh ◽  
Shih-Hsiang Tseng ◽  
Bo Min She
Keyword(s):  
Sample Preparation ◽  
Cross Section ◽  
Seed Layer ◽  
Target Location ◽  
Process Development ◽  
Process Integration ◽  
Ion Beam ◽  
Main Tool ◽  
Dual Beam ◽  
Sample Preparation Procedure

Abstract In this study, an FIB-based cross section TEM sample preparation procedure for targeted via with barrier/Cu seed layer is introduced. The dual beam FIB with electron beam for target location and Ga ion beam for sample milling is the main tool for the targeted via with barrier/Cu seed layer inspection. With the help of the FIB operation and epoxy layer protection, ta cross section TEM sample at a targeted via with barrier/Cu seed layer could be made. Subsequent TEM inspection is used to verify the quality of the structure. This approach was used in the Cu process integration performance monitor. All these TEM results are very helpful in process development and yield improvement.

Effect of Seed Layer Deposition, Au Film Layer Thickness and Crystal Orientation on the Synthesis of Hydrothermally Grown ZnO Nanowires

2014 ◽  
Vol 10 (6) ◽  
pp. 827-836 ◽  
Author(s):  
D.P. Neveling ◽  
T.S. Heever ◽  
R. Bucher ◽  
W.J. Perold ◽  
L.M.T. Dicks
Keyword(s):  
Layer Thickness ◽  
Seed Layer ◽  
Crystal Orientation ◽  
Zno Nanowires ◽  
Au Film ◽  
Layer Deposition ◽  
Film Layer

scholarly journals 27.2: Invited Paper: Towards High Performance Gate Electrodes: Resistance Reduction in Molybdenum Films by Seed Layer Application

2021 ◽  
Vol 52 (S1) ◽  
pp. 170-174
Author(s):  
Hennrik Schmidt ◽  
Harald Koestenbauer ◽  
Dominik Lorenz ◽  
Christian Linke ◽  
Enrico Franzke ◽  
...  
Keyword(s):  
Seed Layer ◽  
High Performance ◽  
Gate Electrodes ◽  
Resistance Reduction

Rapid metallization by copper electroplating on insulating substrate using silver nanowires conductive composite as seed layer

2021 ◽  
Vol 27 ◽  
pp. 100819
Author(s):  
Zhiqiang Lai ◽  
Tao Zhao ◽  
Pengli Zhu ◽  
Jing Xiang ◽  
Dan Liu ◽  
...  
Keyword(s):  
Seed Layer ◽  
Silver Nanowires ◽  
Conductive Composite ◽  
Copper Electroplating

scholarly journals Copper-graphene heterostructure for back-end-of-line compatible high-performance interconnects

2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Myungwoo Son ◽  
Jaewon Jang ◽  
Yongsu Lee ◽  
Jungtae Nam ◽  
Jun Yeon Hwang ◽  
...  
Keyword(s):  
High Performance ◽  
Direct Synthesis ◽  
Chemical Vapor ◽  
Multilayer Graphene ◽  
Time To Failure ◽  
Practical Applications ◽  
Cu Interconnects ◽  
Pressure Chemical ◽  
Cu Interconnect ◽  
Pure Cu

AbstractHere, we demonstrate the fabrication of a Cu-graphene heterostructure interconnect by the direct synthesis of graphene on a Cu interconnect with an enhanced performance. Multilayer graphene films were synthesized on Cu interconnect patterns using a liquid benzene or pyridine source at 400 °C by atmospheric pressure chemical vapor deposition (APCVD). The graphene-capped Cu interconnects showed lower resistivity, higher breakdown current density, and improved reliability compared with those of pure Cu interconnects. In addition, an increase in the carrier density of graphene by doping drastically enhanced the reliability of the graphene-capped interconnect with a mean time to failure of >106 s at 100 °C under a continuous DC stress of 3 MA cm−2. Furthermore, the graphene-capped Cu heterostructure exhibited enhanced electrical properties and reliability even if it was a damascene-patterned structure, which indicates compatibility with practical applications such as next-generation interconnect materials in CMOS back-end-of-line (BEOL).

scholarly journals Fabrication of Piezoelectric ZnO Nanowires Energy Harvester on Flexible Substrate Coated with Various Seed Layer Structures

Nanomaterials ◽  
2021 ◽  
Vol 11 (6) ◽  
pp. 1433
Author(s):  
Taoufik Slimani Tlemcani ◽  
Camille Justeau ◽  
Kevin Nadaud ◽  
Daniel Alquier ◽  
Guylaine Poulin-Vittrant
Keyword(s):  
Seed Layer ◽  
Layer Structure ◽  
Mechanical Energy ◽  
Flexible Substrate ◽  
Average Power ◽  
Electrical Characterization ◽  
Zno Nanowires ◽  
Device Structure ◽  
Layer Structures ◽  
Electrical Output

Flexible piezoelectric nanogenerators (PENGs) are very attractive for mechanical energy harvesting due to their high potential for realizing self-powered sensors and low-power electronics. In this paper, a PENG that is based on zinc oxide (ZnO) nanowires (NWs) is fabricated on flexible and transparent Polydimethylsiloxane (PDMS) substrate. The ZnO NWs were deposited on two different seed layer structures, i.e., gold (Au)/ZnO and tin-doped indium-oxide (ITO)/ZnO, using hydrothermal synthesis. Along with the structural and morphological analyses of ZnO NWs, the electrical characterization was also investigated for ZnO NWs-based flexible PENGs. In order to evaluate the suitability of the PENG device structure, the electrical output performance was studied. By applying a periodic mechanical force of 3 N, the ZnO NWs-based flexible PENG generated a maximum root mean square (RMS) voltage and average power of 2.7 V and 64 nW, respectively. Moreover, the comparison between the fabricated device performances shows that a higher electrical output can be obtained when ITO/ZnO seed layer structure is adopted. The proposed ZnO NWs-based PENG structure can provide a flexible and cost-effective device for supplying portable electronics.

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