Electrical properties of an a-Si/Si(p)/Si(n) heterojunction device

In this paper, a film of n-ZnO nanowalls was deposited over p-silicon (Si) substrate by thermally evaporating metallic zinc powder in oxygen gas environment. Several techniques were used to examine various properties of prepared ZnO nanowalls. The morphological study confirmed that the grown ZnO film possesses nanowalls shaped morphologies containing three dimensional (3D) interconnected nanowalls forming large voids with irregular shapes. Interestingly, whole Si substrate was covered with nanowalls shaped morphologies. The structural characterizations examined by x-ray diffraction (XRD) confirmed that the deposited nanowalls possess wurtzite hexagonal crystal structure. The presence of a strong UV and suppressed green emissions at room-temperature photoluminescence (PL) spectrum exhibited good optical properties of the deposited nanowalls. The electrical properties of the deposited n-ZnO nanowalls over p-silicon substrate assembly was examined in both forward and reverse bias conditions at room-temperature. The fabricated heterojunction device exhibits a standard rectifying behavior which manifests itself in an exponential increase of the current with increase in voltage at forward bias condition. Also, it has a good quality factor similar to an ideal diode.

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Temperature-dependent heterojunction device characteristics of n-ZnO nanorods/p-Si assembly

Materials Express ◽

10.1166/mex.2020.1595 ◽

2020 ◽

Vol 10 (1) ◽

pp. 29-36

Author(s):

Rashad I. Badran ◽

Yas Al-Hadeethi ◽

Ahmad Umar ◽

Saleh H. Al-Heniti ◽

Bahaaudin M. Raffah ◽

...

Keyword(s):

Electrical Properties ◽

Hexagonal Phase ◽

Zno Nanorods ◽

X Ray Diffraction ◽

Temperature Dependent ◽

Different Temperatures ◽

Evaporation Technique ◽

Wurtzite Hexagonal Phase ◽

Heterojunction Device ◽

Increasing Temperature

Heterojunction diode based on n-ZnO nanorods/p-Silicon (Si) assembly was fabricated, examined and reported here. Horizontal quartz tube thermal evaporation technique was used for the growth of ZnO nanorods on Si substrate. The nanorods were characterized by several techniques to examine the structural, morphological, scattering and electrical properties. Wurtzite hexagonal phase of the grown aligned nanorods was observed using X-ray diffraction (XRD) and scanning electron microscopy (SEM). The appearance of a sharp Raman peak at 438 cm–1 was observed and it is related to the E2(high) mode of the wurtzite hexagonal phase of ZnO. The electrical properties of the fabricated heterojunction assembly were examined at different temperatures (298∼398 K) in both reverse and forward biased conditions, and a good stability was observed over the entire temperature range. A reduction in the turn-on and breakdown voltage was observed with increasing temperature. By increasing the temperature, the effective potential barrier height was increased, while quality factor was decreased. The observed activation energy was found to be ∼93.4 meV, higher than the exciton binding energy of ZnO.

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Perylene Tetracarboxylic Diimide: Characterization and Its Role in the Electrical Properties of an Ag/N-BuHHPDI/PEDOT:PSS/p-Si Heterojunction Device

Journal of Electronic Materials ◽

10.1007/s11664-019-07664-y ◽

2019 ◽

Vol 49 (1) ◽

pp. 395-401 ◽

Cited By ~ 4

Author(s):

Muhammad Zeb ◽

Muhammad Tahir ◽

Fida Muhammad ◽

Dil Nawaz Khan ◽

Muhammad Hassan Sayyad ◽

...

Keyword(s):

Electrical Properties ◽

Heterojunction Device

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Analysis on the temperature dependent electrical properties of Cr/Graphene oxide-Fe3O4 nanocomposites/n-Si heterojunction device

Diamond and Related Materials ◽

10.1016/j.diamond.2020.107933 ◽

2020 ◽

Vol 108 ◽

pp. 107933 ◽

Cited By ~ 1

Author(s):

İlknur Gümüs ◽

Önder Metin ◽

Melike Sevim ◽

Şakir Aydoğan

Keyword(s):

Graphene Oxide ◽

Electrical Properties ◽

Temperature Dependent ◽

Heterojunction Device

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In situ TEM measurements of the electrical properties of interface dislocations

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100131322 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1338-1339

Author(s):

F. M. Ross ◽

R. Hull ◽

D. Bahnck ◽

J. C. Bean ◽

L. J. Peticolas ◽

...

Keyword(s):

Electrical Properties ◽

Electronic Device ◽

In Situ Tem ◽

Device Performance ◽

Misfit Dislocations ◽

Electrical Characteristics ◽

Strained Layer ◽

Transmission Electron ◽

Interfacial Dislocations

We describe an investigation of the electrical properties of interfacial dislocations in strained layer heterostructures. We have been measuring both the structural and electrical characteristics of strained layer p-n junction diodes simultaneously in a transmission electron microscope, enabling us to correlate changes in the electrical characteristics of a device with the formation of dislocations.The presence of dislocations within an electronic device is known to degrade the device performance. This degradation is of increasing significance in the design and processing of novel strained layer devices which may require layer thicknesses above the critical thickness (hc), where it is energetically favourable for the layers to relax by the formation of misfit dislocations at the strained interfaces. In order to quantify how device performance is affected when relaxation occurs we have therefore been investigating the electrical properties of dislocations at the p-n junction in Si/GeSi diodes.

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The morphologies and electrical properties of indium contacts on (100) cadmium telluride surfaces

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100131747 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1422-1423

Author(s):

A.M. Letsoalo ◽

M.E. Lee ◽

E.O. de Neijs

Keyword(s):

Electrical Properties ◽

Cadmium Telluride ◽

Methanol Solution ◽

Electrical Characteristics ◽

Metal Contacts ◽

Deposition Technique ◽

Interfacial Layers ◽

Semiconductor Contacts ◽

Grown Single Crystal ◽

Diamond Abrasive

Semiconductor devices require metal contacts for efficient collection of electrical charge. The physics of these metal/semiconductor contacts assumes perfect, abrupt and continuous interfaces between the layers. However, in practice these layers are neither continuous nor abrupt due to poor nucleation conditions and the formation of interfacial layers. The effects of layer thickness, deposition rate and substrate stoichiometry have been previously reported. In this work we will compare the effects of a single deposition technique and multiple depositions on the morphology of indium layers grown on (100) CdTe substrates. The electrical characteristics and specific resistivities of the indium contacts were measured, and their relationships with indium layer morphologies were established.Semi-insulating (100) CdTe samples were cut from Bridgman grown single crystal ingots. The surface of the as-cut slices were mechanically polished using 5μm, 3μm, 1μm and 0,25μm diamond abrasive respectively. This was followed by two minutes immersion in a 5% bromine-methanol solution.

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Formation of high temperature phase in flash-evaporated SnSe films

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100176629 ◽

1990 ◽

Vol 48 (4) ◽

pp. 698-699

Author(s):

J.P.S. Hanjra

Keyword(s):

Thin Films ◽

Electrical Properties ◽

Energy Gap ◽

Dominant Role ◽

Fine Powder ◽

High Temperature Phase ◽

Temperature Phase ◽

Water Mixture ◽

Flash Evaporation ◽

Photovoltaic Applications

Tin mono selenide (SnSe) with an energy gap of about 1 eV is a potential material for photovoltaic applications. Various authors have studied the structure, electronic and photoelectronic properties of thin films of SnSe grown by various deposition techniques. However, for practical photovoltaic junctions the electrical properties of SnSe films need improvement. We have carried out investigations into the properties of flash evaporated SnSe films. In this paper we report our results on the structure, which plays a dominant role on the electrical properties of thin films by TEM, SEM, and electron diffraction (ED).Thin films of SnSe were deposited by flash evaporation of SnSe fine powder prepared from high purity Sn and Se, onto glass, mica and KCl substrates in a vacuum of 2Ø micro Torr. A 15% HF + 2Ø% HNO3 solution was used to detach SnSe film from the glass and mica substrates whereas the film deposited on KCl substrate was floated over an ethanol water mixture by dissolution of KCl. The floating films were picked up on the grids for their EM analysis.

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