Investigation into gate dielectric material using different optimization techniques in carbon nanotube field effect transistors

2019 ◽  
Vol 29 (9) ◽  
pp. 094002
Author(s):  
Ankita Dixit ◽  
Navneet Gupta
2020 ◽  
Vol 9 (3) ◽  
pp. 943-949
Author(s):  
Ankita Dixit ◽  
Navneet Gupta

In this paper we presented the analysis of Carbon Nanotube Field Effect Transistors (CNFETs) using various high-k gate dielectric materials. The objective of this work was to choose the best possible material for gate dielectric. This paper also presented the study on the effect of thickness of gate dielectric on the performance of the device. For the analysis (19, 0) CNT was considered because the diameter of (19, 0) CNT is 1.49nm and the CNFETs have been fabricated with the CNT diameter of ~1.5nm. It has been observed that La2O3 is the best gate dielectric material followed by HfO2 and ZrO2. It was also observed that as thickness of gate dielectric material reduces, drain current of CNFET increases. The outcomes of this study matches with the analytical results and hence confirm the results


2013 ◽  
Vol 14 (10) ◽  
pp. 2645-2651 ◽  
Author(s):  
Chun-Yi Lee ◽  
Jenn-Chang Hwang ◽  
Yu-Lun Chueh ◽  
Ting-Hao Chang ◽  
Yi-Yun Cheng ◽  
...  

2012 ◽  
Vol 101 (5) ◽  
pp. 053311 ◽  
Author(s):  
M. Kawamura ◽  
Yoshio Nakahara ◽  
Mitsuhiro Ohse ◽  
Maki Kumei ◽  
K. Uno ◽  
...  

Nano Letters ◽  
2007 ◽  
Vol 7 (1) ◽  
pp. 22-27 ◽  
Author(s):  
Ralf Thomas Weitz ◽  
Ute Zschieschang ◽  
Franz Effenberger ◽  
Hagen Klauk ◽  
Marko Burghard ◽  
...  

2008 ◽  
Vol 10 (10) ◽  
pp. 103019 ◽  
Author(s):  
Marcus Rinkiö ◽  
Andreas Johansson ◽  
Marina Y Zavodchikova ◽  
J Jussi Toppari ◽  
Albert G Nasibulin ◽  
...  

2011 ◽  
Vol 181-182 ◽  
pp. 343-348
Author(s):  
K.C. Narasimhamurthy ◽  
Roy Paily Palathinkal

In this paper, we present the fabrication and characterization of semiconducting carbon nanotube thin-film field-effect transistors (SN-TFTs). High-k dielectric material, hafnium-oxide (HfOX) is used as the gate-oxide of the device. A Thin-film of semi-conducting single walled carbon nanotube (SWCNT) is deposited on the amino-silane modified HfOX surface. Two types of SN-TFTs with interdigitated source and drain contacts are fabricated using 90% and 95% purity of semiconducting SWCNTs (s-SWCNT), have exhibited a p-type behavior with a distinct linear and saturation region of operation. For 20 µm channel length SN-TFT with 95% pure s-SWCNTs has a peak on-off current ratio of 3.5×104 and exhibited a transconductance of 950 µS. The SN-TFT fabricated with HfOX gate oxide has shown a steep sub-threshold slope of 750 mV/decade and threshold voltage of -0.7 V. The SN-TFT of channel length 50 µm has exhibited a maximum mobility of 26.9 cm2/V•s.


NANO ◽  
2006 ◽  
Vol 01 (01) ◽  
pp. 1-13 ◽  
Author(s):  
HONGJIE DAI ◽  
ALI JAVEY ◽  
ERIC POP ◽  
DAVID MANN ◽  
WOONG KIM ◽  
...  

This paper presents a review on our recent work on carbon nanotube field effect transistors, including the development of ohmic contacts, high-κ gate dielectric integration, chemical functionalization for conformal dielectric deposition and pushing the performance limit of nanotube FETs by channel length scaling. Due to the importance of high current operations of electronic devices, we also review the high field electrical transport properties of nanotubes on substrates and in freely suspended forms. Owing to their unique properties originating from their crystalline 1D structure and the strong covalent carbon–carbon bonding configuration, carbon nanotubes are highly promising as building blocks for future electronics. They are found to perform favorably in terms of ON-state current density as compared to the existing silicon technology, owing to their superb electron transport properties and compatibility with high-κ gate dielectrics. Future directions and challenges for carbon nanotube-based electronics are also discussed.


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