Study on the influence of ion incident energy on surface charging in plasma etching

2021 ◽  
Author(s):  
Peng Zhang
Author(s):  
Peng Zhang ◽  
Ruvarashe Dambire

Abstract In plasma etching process, the edge roughness and mask pattern usually play a significant role in the deformation of holes under the influence of charging effect. The competitive effect between these two factors has been investigated, focusing on the surface charging in a hexagonal array, with various values of roughness parameters (amplitude (A) and wavelength (W)) and distances between holes (L). A series of classical particle dynamic simulations of surface charging, surface etching and profile evolution were used to investigate the effect of roughness and pattern on charging. This study showed that various roughness and patterns (represented by different values of L) can significantly influence surface distributions of the electric-field (E-field) and the etching rates on the mask surface. The simulations also showed that (1) the shape of the pattern array influences the mask hole profile during etching process, i.e. a hexagonal array pattern tends to deform the profile of a circular mask hole into a hexagonal hole; (2) pattern roughness is aggravated during etching process. These factors were found to be significant only at a small feature pitch and may be ignored at a large feature pitch. Possible mechanisms of these results during etching process are discussed. This work sheds light on the ways to maintain pattern integrity and further improve the quality of the pattern transfer onto the substrate.


1994 ◽  
Vol 33 (Part 1, No. 7B) ◽  
pp. 4446-4449 ◽  
Author(s):  
Shigemi Murakawa ◽  
James P. McVittie

2018 ◽  
Vol 123 (7) ◽  
pp. 073303 ◽  
Author(s):  
George Memos ◽  
Elefterios Lidorikis ◽  
George Kokkoris

1994 ◽  
Vol 64 (12) ◽  
pp. 1558-1560 ◽  
Author(s):  
Shigemi Murakawa ◽  
Sychyi Fang ◽  
James P. McVittie

1995 ◽  
Vol 389 ◽  
Author(s):  
B.A. Helmer ◽  
D. B. Graves ◽  
M.E. Barone

ABSTRACTThe impact of Si with incident energy Ei (0.1, 1, 5, 10, 20, and 50 eV) and angle θi (0° and 60° from the surface normal) into three model Si surfaces with varying degrees of F coverage (0 ML F, ∼ 1 ML F, and ∼2 ML F) was simulated using classical molecular dynamics (MD). From the simulation results, the probabilities for incident Si reflection and removal of surface Si and F were obtained as a function of Ei, θi, and F surface coverage. In general, these probabilities were observed to depend significantly on these parameters. This result implies that feature evolution simulations require surface reaction models with the necessary functionality in order to make quantitative predictions.


Author(s):  
Richard G. Sartore

In the evaluation of GaAs devices from the MMIC (Monolithic Microwave Integrated Circuits) program for Army applications, there was a requirement to obtain accurate linewidth measurements on the nominal 0.5 micrometer gate lengths used to fabricate these devices. Preliminary measurements indicated a significant variation (typically 10 % to 30% but could be more) in the critical dimensional measurements of the gate length, gate to source distance and gate to drain distance. Passivation introduced a margin of error, which was removed by plasma etching. Additionally, the high aspect ratio (4-5) of the thick gold (Au) conductors also introduced measurement difficulties. The final measurements were performed after the thick gold conductor was removed and only the barrier metal remained, which was approximately 250 nanometer thick platinum on GaAs substrate. The thickness was measured using the penetration voltage method. Linescan of the secondary electron signal as it scans across the gate is shown in Figure 1.


Author(s):  
T.C. Sheu ◽  
S. Myhajlenko ◽  
D. Davito ◽  
J.L. Edwards ◽  
R. Roedel ◽  
...  

Liquid encapsulated Czochralski (LEC) semi-insulating (SI) GaAs has applications in integrated optics and integrated circuits. Yield and device performance is dependent on the homogeniety of the wafers. Therefore, it is important to characterise the uniformity of the GaAs substrates. In this respect, cathodoluminescence (CL) has been used to detect the presence of crystal defects and growth striations. However, when SI GaAs is examined in a scanning electron microscope (SEM), there will be a tendency for the surface to charge up. The surface charging affects the backscattered and secondary electron (SE) yield. Local variations in the surface charge will give rise to contrast (effectively voltage contrast) in the SE image. This may be associated with non-uniformities in the spatial distribution of resistivity. Wakefield et al have made use of “charging microscopy” to reveal resistivity variations across a SI GaAs wafer. In this work we report on CL imaging, the conditions used to obtain “charged” SE images and some aspects of the contrast behaviour.


Author(s):  
F. Banhart ◽  
F.O. Phillipp ◽  
R. Bergmann ◽  
E. Czech ◽  
M. Konuma ◽  
...  

Defect-free silicon layers grown on insulators (SOI) are an essential component for future three-dimensional integration of semiconductor devices. Liquid phase epitaxy (LPE) has proved to be a powerful technique to grow high quality SOI structures for devices and for basic physical research. Electron microscopy is indispensable for the development of the growth technique and reveals many interesting structural properties of these materials. Transmission and scanning electron microscopy can be applied to study growth mechanisms, structural defects, and the morphology of Si and SOI layers grown from metallic solutions of various compositions.The treatment of the Si substrates prior to the epitaxial growth described here is wet chemical etching and plasma etching with NF3 ions. At a sample temperature of 20°C the ion etched surface appeared rough (Fig. 1). Plasma etching at a sample temperature of −125°C, however, yields smooth and clean Si surfaces, and, in addition, high anisotropy (small side etching) and selectivity (low etch rate of SiO2) as shown in Fig. 2.


2018 ◽  
Author(s):  
Julia Sun ◽  
Benjamin Almquist

For decades, fabrication of semiconductor devices has utilized well-established etching techniques to create complex nanostructures in silicon. Of these, two of the most common are reactive ion etching in the gaseous phase and metal-assisted chemical etching (MACE) in the liquid phase. Though these two methods are highly established and characterized, there is a surprising scarcity of reports exploring the ability of metallic films to catalytically enhance the etching of silicon in dry plasmas via a MACE-like mechanism. Here, we discuss a <u>m</u>etal-<u>a</u>ssisted <u>p</u>lasma <u>e</u>tch (MAPE) performed using patterned gold films to catalyze the etching of silicon in an SF<sub>6</sub>/O<sub>2</sub> mixed plasma, selectively increasing the rate of etching by over 1000%. The degree of enhancement as a function of Au catalyst configuration and relative oxygen feed concentration is characterized, along with the catalytic activities of other common MACE metals including Ag, Pt, and Cu. Finally, methods of controlling the etch process are briefly explored to demonstrate the potential for use as a liquid-free fabrication strategy.


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