scholarly journals X-ray characterization of BUSARD chip: A HV-SOI monolithic particle detector with pixel sensors under the buried oxide

2021 ◽  
Vol 16 (12) ◽  
pp. P12030
Author(s):  
F. Alcalde Bessia ◽  
J. Lipovetzky ◽  
I. Perić

Abstract This work presents the design of BUSARD, an application specific integrated circuit (ASIC) for the detection of ionizing particles. The ASIC is a monolithic active pixel sensor which has been fabricated in a High-Voltage Silicon-On-Insulator (HV-SOI) process that allows the fabrication of a buried N+ diffusion below the Buried OXide (BOX) as a standard processing step. The first version of the chip, BUSARD-A, takes advantage of this buried diffusion as an ionizing particle sensor. It includes a small array of 13×13 pixels, with a pitch of 80 μm, and each pixel has one buried diffusion with a charge amplifier, discriminator with offset tuning and digital processing. The detector has several operation modes including particle counting and Time-over-Threshold (ToT). An initial X-ray characterization of the detector was carried out, obtaining several pulse height and ToT spectra, which then were used to perform the energy calibration of the device. The Molybdenum 𝐊α emission was measured with a standard deviation of 127 e- of ENC by using the analog pulse output, and with 276 e- of ENC by using the ToT digital output. The resolution in ToT mode is dominated by the pixel-to-pixel variation.

2011 ◽  
Vol 20 (01) ◽  
pp. 71-87 ◽  
Author(s):  
DAVID FITRIO ◽  
SUHARDI TJOA ◽  
ANAND MOHAN ◽  
RONNY VELJANOVSKI ◽  
ANDREW BERRY ◽  
...  

A front-end read-out application specific integrated circuit (ASIC) for a multichannel pixel X-Ray detector system has been fabricated and tested. The chip provides signal amplification for pixelated compound semiconductors such as Cadmium Telluride ( CdTe ) and Cadmium Zinc Telluride ( CZT ) with either 1 mm or 200 μm pitch. Both the detector (compound semiconductor) and ASIC are combined to target future research applicable to spectroscopic imaging in high intensity X-Ray biomedical detector systems. The ASIC was fabricated in a 0.35 μm process by Austria Microsystems and consists of 32 channels, where each channel contains a charge-sensitive amplifier, a pulse shaper and two further stages of amplification providing an overall gain of 1 mV per kilo electron volt (keV) for photons within the energy range of 30–120 keV. The preamplifier and shaper circuits are designed for both positive and negative charge collection (electrons and holes) produced by the CdTe or CZT detectors. The ASIC's shaper has been designed with a time constant of 100 ns to allow operation at photon rate events above 1 Million photons per pixel per second. The design and characterization of the readout chip will be discussed in this paper presenting results from both the simulated and the fabricated chip.


1991 ◽  
Vol 206 (1-2) ◽  
pp. 27-33 ◽  
Author(s):  
David I. Ma ◽  
George J. Campisi ◽  
Syed B. Qadri ◽  
Martin C. Peckerar

2014 ◽  
Vol 9 (05) ◽  
pp. C05017-C05017 ◽  
Author(s):  
C Ponchut ◽  
M Ruat ◽  
J Kalliopuska

1998 ◽  
Vol 69 (12) ◽  
pp. 4054-4060 ◽  
Author(s):  
L. M. Logory ◽  
D. R. Farley ◽  
A. D. Conder ◽  
E. A. Belli ◽  
P. M. Bell ◽  
...  

1991 ◽  
Vol 70 (9) ◽  
pp. 4760-4769 ◽  
Author(s):  
L. R. Thompson ◽  
G. J. Collins ◽  
B. L. Doyle ◽  
J. A. Knapp

1987 ◽  
Vol 93 ◽  
Author(s):  
D. R. Myers ◽  
H. J. Stein ◽  
S. S. Tsao ◽  
G. W. Arnold ◽  
R. C. Hughes ◽  
...  

ABSTRACTWe have examined the microstructure and the transport properties of nitrogen-implanted silicon-on-insulator wafers, as well as the performance of integrated-circuit transistors fabricated in this material. The insulating regions were fabricated in silicon by the unpatterned implantation of 4×1017 /cm2, 300 keV nitrogen dimers followed by annealing at 1473 K for 5 hours. For these parameters, the buried nitrogen-implanted layer crystallized into α-silicon nitride, and contains ≈20% excess silicon in the form of silicon inclusions of 5–15 nm diameter. The surface silicon layers are characterized by low-mobility, p-type conduction. The buried dielectric has a resistivity of approximately 108 Ωcm. Functional p-channel, integrated circuit transistors have been fabricated in n-type epitaxial silicon grown over the buried-nitride wafers. These transistors devices are similar in performance to those fabricated in bulk silicon,(hole mobilities in inversion layers of 140 cm2/V-s), and demonstrate the suitability of the buried nitride process for integrated circuit applications.


1996 ◽  
Vol 23 (10) ◽  
pp. 1659-1670 ◽  
Author(s):  
Lawrence T. Hudson ◽  
Richard D. Deslattes ◽  
Albert Henins ◽  
Christopher T. Chantler ◽  
Ernest G. Kessler ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document