New MCM composed of D/L base substrate, high-density-wiring CSP and 3D memory modules

Author(s):  
A. Shibuya ◽  
I. Hazeyama ◽  
T. Shimoto ◽  
N. Takahashi ◽  
N. Senba ◽  
...  
2009 ◽  
Vol 6 (1) ◽  
pp. 6-12 ◽  
Author(s):  
Arne Albertsen ◽  
Koji Koiwai ◽  
Kyoji Kobayashi ◽  
Tomonori Oguchi ◽  
Katsumi Aruga

This paper highlights the possible combination of technologies such as thick film screen printing, ink jet, and post-firing thin film processes in conjunction with laser-drilled fine vias to produce high-density, miniaturized LTCC substrates. To obtain the silver pattern on the inner layers, both conventional thick film printing and ink jet printing (using nano silver particle dispersed ink) were applied on the ceramic green sheets. The ink jet process made it possible to metallize fine lines with line/space = 30/30 μm. For interlayer connections, fine vias of 30 μm in diameter formed by UV laser were used. Then these sheets were stacked on top of each other and fired to obtain a base substrate. On this base substrate, fine copper patterns for flip chip mounting were formed by a thin film process. The surface finish consisted of a nickel passivation and a gold layer deposited by electroless plating. The combination of the three patterning processes for conducting traces and UV laser drilling of fine vias make it appear possible to realize fine pitch LTCC, for example, for flip chip device mounting.


2009 ◽  
Vol 53 (12) ◽  
pp. 1287-1292 ◽  
Author(s):  
C. Kügeler ◽  
M. Meier ◽  
R. Rosezin ◽  
S. Gilles ◽  
R. Waser

Author(s):  
Saketh Mahalingam ◽  
Shashikant Hegde ◽  
Gnyaneshwar Ramakrishna ◽  
Raghuram V. Pucha ◽  
Suresh K. Sitaraman

This paper studies several base substrate materials and interlayer dielectric materials for High Density Interconnect (HDI) boards, addressing reliability issues such as warpage, dielectric cracking and microvia cracking. Design of simulation models with an optimization technique is developed to study material interaction effects on the HDI reliability. A plastic strain gradient-based computational algorithm is developed to study the thermo-mechanical deformation of fine-feature microvia structures.


Author(s):  
Joe Chu ◽  
Maosen Chen ◽  
Wyeman Chen

The continued emphasis on higher-density (smaller) and better-performance (faster) on electronics system design makes the board (PCB layout) design become more complex and usually will challenge the DFM guidelines currently applied by the industry. For example, the design of mirrored BGAs on double-sided board, which is not recommended by current industry DFM guidelines, due to the real estate constraint. In fact, there are several successful design applying low pin count mirrored or staggered BGAs or CSPs for certain applications, such as memory modules.


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