Wire Fatigue Models for Power Electronic Modules

This paper presents two, semi-analytical, physics-of-failure based life prediction model formulations for flexural failure of wires ultrasonically wedge bonded to pads at different heights. The life prediction model consists of a load transformation model and a damage model. The load transformation model determines the cyclic strain is created by a change in wire curvature at the heel of the wire resulting from expansion of the wire and displacement of the frame. The damage model calculates the life based on the strain cycle magnitude and the elastic-plastic fatigue response of the wire. The first formulation provides quick calculation of the time to failure for a wire of known geometry. The second formulation optimizes the wire geometry for maximum time to failure. These model formulations support virtual qualification of power modules where wire flexural fatigue is a dominant failure mechanism. The model has been validated using temperature cycling test results.

Thermal Model of a Thinned-Die Cooling System

For through-silicon optical probing of microprocessors, the heat generated by devices with power over 100W must be dissipated [1]. To accommodate optical probing, a seemingly elaborate cooling system that controls the microprocessor temperature from 60 to 100° C for device power up to 150W was designed [2]. The system parameters to achieve the desired thermal debug environment were cooling air temperature and air flow. A mathematical model was developed to determine both device temperature and input power. The 3-D heat equation that governs the temperature distribution was simplified to a case of a 1-D rod with one end at the device center and the other at the cooling air intake. Thus the cooling system was reduced to an analytical expression. From experimental data, we computed all coefficients in the model, then ran extensive tests to verify—the accuracy was better than 10% over the entire temperature and power ranges.

3-Dimensional Hybrid Continuum-Atomistic Simulations for Multiscale Hydrodynamics

We present an adaptive mesh and algorithmic refinement (AMAR) scheme for modeling multi-scale hydrodynamics. The AMAR approach extends standard conservative adaptive mesh refinement (AMR) algorithms by providing a robust flux-based method for coupling an atomistic fluid representation to a continuum model. The atomistic model is applied locally in regions where the continuum description is invalid or inaccurate, such as near strong flow gradients and at fluid interfaces, or when the continuum grid is refined to the molecular scale. The need for such “hybrid” methods arises from the fact that hydrodynamics modeled by continuum representations are often under-resolved or inaccurate while solutions generated using molecular resolution globally are not feasible. In the implementation described herein, Direct Simulation Monte Carlo (DSMC) provides an atomistic description of the flow and the compressible two-fluid Euler equations serve as our continuum-scale model. The AMR methodology provides local grid refinement while the algorithm refinement feature allows the transition to DSMC where needed. The continuum and atomistic representations are coupled by matching fluxes at the continuum-atomistic interfaces and by proper averaging and interpolation of data between scales. Our AMAR application code is implemented in C++ and is built upon the SAMRAI (Structured Adaptive Mesh Refinement Application Infrastructure) framework developed at Lawrence Livermore National Laboratory. SAMRAI provides the parallel adaptive gridding algorithm and enables the coupling between the continuum and atomistic methods.

Parallel Molecular Dynamics Code Validation Through Bulk Silicon Thermal Conductivity Calculations

We have implemented a parallel molecular dynamics algorithm, which incorporates the Stillinger-Weber interatomic potential. The code was parallelized using a ghost cell atomic division approach, ensuring scaling with the number of processors and a significant increase in speed with respect to the serial version. The methodology is validated by computing the thermal conductivity and phonon frequency spectra of bulk silicon single crystals for different domain sizes at 1000K. The predicted thermal conductivities are consistent with the experimental value at that temperature. In addition, the phonon frequency spectra capture the properties expected from the dispersion relations for silicon.

Thermal Optimization of Microchannel Heat Sink With Pin Fin Structures

In the present work, a novel compact modeling method based on the volume-averaging technique and its application to the analysis of fluid flow and heat transfer in pin fin heat sinks are presented. The pin fin heat sink is modeled as a porous medium. The volume-averaged momentum and energy equations for fluid flow and heat transfer in pin fin heat sinks are obtained using the local volume-averaging method. The permeability, the Ergun constant and the interstitial heat transfer coefficient required to solve these equations are determined experimentally. To validate the compact model proposed in this paper, 20 aluminum pin fin heat sinks having a 101.43 mm × 101.43 mm base size are tested with an inlet velocity ranging from 1 m/s to 5 m/s. In the experimental investigation, the heat sink is heated uniformly at the bottom. Pressure drop and heat transfer characteristics of pin fin heat sinks obtained from the porous medium approach are compared with experimental results. Upon comparison, the porous medium approach is shown to predict accurately the pressure drop and heat transfer characteristics of pin fin heat sinks. Finally, surface porosities of the pin fin heat sink for which the thermal resistance of the heat sink is minimal are obtained under constraints on pumping power and heat sink size. The optimized pin fin heat sinks are shown to be superior to the optimized straight fin heat sinks in thermal performance by about 50% under the same constraints on pumping power and heat sink size.

Tether System Designed for Flip-Chip Bonded MEMS

Flip-chip bonding is important to integrate MEMS devices with other components or to make novel devices. The use of tethers when flip-chip bonding is valuable because it enables the release of the MEMS based device prior to bonding. Releasing the device prior to bonding allows the possibility to bond to a substrate that includes materials that are incompatible with the release process, increase yield since any devices lost during release are not bonded, and avoid damage to the bond. This paper presents a set of design rules for devices created with the MUMPs process that can be implemented to allow the device to be tether flip-chip bonded. The rules outline the design of tethers, mechanical stops, and locking bumps, which work as a system to keep the device from slipping or twisting during bonding, but break free from the donor substrate after bonding. Examples of success, reasons for past failures and the solutions are presented.

Design and Analysis of Micromachined Thermosyphon for Cooling of High-Power InP HBT Circuits

Integrated InP heterojunction bipolar transistors (HBTs) are used as a high-speed switch in high-power radio frequency (RF) circuits for microwave wireless communications. The power dissipation of each of these devices often reaches as high as 1 W, raising concerns for their thermal reliability. The relatively poor thermal conductivity of InP prohibits effective spreading of heat within the device substrate. To address this problem, this work proposes a novel microfluidic device called the “micro thermosyphon” for cooling the InP-based microwave circuits. This paper describes the concept of the micro thermosyphon and presents its design and analysis, accounting for the large surface tension effect of the working fluid at the micrometer scale. Our simulation suggests that the proposed device could remove a heat flux density as large as 25 W/cm2 from a high-power InP HBT circuit while maintaining the circuit temperature lower than 100 °C. The micro thermosyphon is a fully passive cooling device suited for achieving effective on-chip cooling without requiring any drive power. Experimental work is currently being under way to validate the device performance.

Electroplated Si3N4 Reinforced Metal Matrix Nanocomposites

Permalloy NiFe matrix nanocomposite layers were electroplated on a copper substrate. The volume fraction of nano-sized Si3N4 particles in NiFe matrix was controlled by the addition of various percentages of Si3N4 particles in the NiFe electrolyte. The nanocomposite layers were analyzed by a scanning electron microscopy (SEM). Microhardness test was performed. With nano-sized Si3N4 particles in the NiFe matrix, the microhardness of NiFe was improved. The samples were then annealed at 800 °C for about 20 hours. The microhardness declined more with more Si3N4 particles in the NiFe matrix. The analysis result from Energy Dispersive Spectrometer (EDS) in the SEM showed that the hardness declination could be caused by the segregation of Si3N4 in the NiFe matrix. Finally this paper presents nanocomposite micromolds fabricated by electroplating onto polymer molds that were fabricated by micro-stereolithgraphy.

Design and Analysis of the CMOS Compatible Pressure Sensor Using Flip Chip and Flex Circuit Board Technologies

In this study, a silicon base piezoresistive pressure sensor using flip chip and flex circuit packaging technologies is studied, designed and analyzed. A novel designed pressure sensor using flip chip packaging with spacer is employed to substitute the conventional chip on board or SOP packaging technology. Subsequently, a finite element method (FEM) is adopted for the designing of the sensor performance. Thermal and pressure loading is applied on the sensor to study the system sensitivity as well as the thermal and packaging effect. The performance of novel packaging pressure sensor is compared with that of the conventional one to demonstrate the feasibility of this novel design. The findings depict that this novel packaging design can not only maintain well sensor sensitivity but also reduce the thermal and packaging effect of the pressure sensor.

Wire Bond Failures in Power Modules

Power modules are key components for traction applications, railway locomotives, streetcars and elevators, all of which are equipped with Insulated Gate Bipolar Transistor (IGBT) modules. In this application field, a highly reliable system is of uppermost interest. Reliability tests show that wire bonding and soldering may cause the modules to fail. The packaging setup is a multilayer system in which different materials are soldered together. During a temperature swing caused by self-heating and/or by changes in the ambient temperature, the layers expand differently. This generally causes shear forces at the terminations of joint interfaces finally leading to material fatigue and shorter life. In this paper, we give an overview of the wire bonding technique used in power modules and discuss the mechanisms and failure modes associated with it.