A Study on the Curing Properties and Viscosities of Non-Conductive Films (NCFs) for Sn-Ag Solder Bump Flip Chip Assembly

2018 ◽  
Author(s):  
HanMin Lee ◽  
SeYong Lee ◽  
JongHo Park ◽  
Chang-kyu Chung ◽  
Kyung-Woon Jang ◽  
...  
Keyword(s):  
Flip Chip ◽  
Solder Bump ◽  
Conductive Films ◽  
Flip Chip Assembly

Material properties of anisotropic conductive films (ACFs) and their flip chip assembly reliability in NAND flash memory applications

2008 ◽  
Vol 48 (7) ◽  
pp. 1052-1061 ◽  
Author(s):  
Kyung-Woon Jang ◽  
Chang-Kyu Chung ◽  
Woong-Sun Lee ◽  
Kyung-Wook Paik
Keyword(s):  
Material Properties ◽  
Flash Memory ◽  
Flip Chip ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Conductive Films ◽  
Flip Chip Assembly ◽  
Memory Applications

63.1: Flip Chip Assembly of Panel-Sized TFT-LCD Scan Drivers with Electroless-Plated Bumps Using Anisotropic Conductive Films

2005 ◽  
Vol 36 (1) ◽  
pp. 1788 ◽  
Author(s):  
Shunji Noda ◽  
Tamaki Toba ◽  
Hiroshi Hayama
Keyword(s):  
Flip Chip ◽  
Conductive Films ◽  
Flip Chip Assembly

Control of Solder Bump Growing Morphology in Lead Free Plating

2019 ◽  
Vol 2019 (1) ◽  
pp. 000488-000491
Author(s):  
Berdy Weng ◽  
Wei-Wei (Xenia) Liu ◽  
Lu-Ming Lai ◽  
Kuang-Hsiung Chen
Keyword(s):  
Quality Control ◽  
Flip Chip ◽  
Solder Bump ◽  
Process Integration ◽  
Lead Free ◽  
Design Rules ◽  
Promising Technology ◽  
Small Feature ◽  
Flip Chip Assembly ◽  
Key Enabling Technologies

Abstract Plating Solder bump is one of the key enabling technologies for flip chip assembly methodology. Flip chip assembly has advanced to support higher levels of interconnect and small feature sizes. Electroplating is a very promising technology for finer bump features when compared with solder printing and ball mounting. Hence, the plated-solder bump morphology is quite important for process quality control and design realization. This paper aims to study the plated solder behavior from as-plated mushroom structure to after reflowed bump stage photoresist sizing. In addition, this activity will consider the full bumping process integration relative to the electroplated solder bump design rules.

The Use of Precision Selective Area Milling for Failure Analysis of Flip-Chip Packages

2002 ◽  
Author(s):  
George F. Gaut
Keyword(s):  
Failure Analysis ◽  
Flip Chip ◽  
Solder Bump ◽  
Selective Area ◽  
Fill Material ◽  
Solder Bumps ◽  
Time Required

Abstract Access to the solder bump and under-fill material of flip-chip devices has presented a new problem for failure analysts. The under-fill and solder bumps have also added a new source for failure causes. A new tool has become available that can reduce the time required to analyze this area of a flip-chip package. By using precision selective area milling it is possible to remove material (die or PCB) that will allow other tools to expose the source of the failure.

scholarly journals Co-design/simulation of flip-chip assembly for high voltage IGBT packages

2017 ◽  
Author(s):  
P. Rajaguru ◽  
C. Bailey ◽  
H. Lu ◽  
A. M. Aliyu ◽  
A. Castellazzi ◽  
...  
Keyword(s):  
High Voltage ◽  
Flip Chip ◽  
Flip Chip Assembly
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