Low drop-out voltage regulator with full on-chip capacitance for slot-based operation

2008 ◽  
Author(s):  
Wim Kruiskamp ◽  
Rene Beumer
Keyword(s):  
Drop Out ◽  
Voltage Regulator ◽  
On Chip

On-chip low drop-out voltage regulator with NMOS power transistor and dynamic biasing technique

2008 ◽  
Vol 58 (2) ◽  
pp. 81-90 ◽  
Author(s):  
Gianluca Giustolisi ◽  
Christian Falconi ◽  
Arnaldo D’Amico ◽  
Gaetano Palumbo
Keyword(s):  
Drop Out ◽  
Voltage Regulator ◽  
Power Transistor ◽  
Dynamic Biasing ◽  
On Chip

scholarly journals Nano-Power Low-Dropout Voltage Regulator Circuit in 90-nm CMOS Technology for RF SoC Applications

2021 ◽  
Vol 15 ◽  
pp. 240-248
Author(s):  
Hicham Akhamal ◽  
Mostafa Chakir ◽  
Hatim Ameziane ◽  
Mohammed Akhamal ◽  
Kamal Zared ◽  
...  
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
Cmos Technology ◽  
System On Chip ◽  
Drop Out ◽  
Voltage Regulator ◽  
Weak Inversion ◽  
Low Power Dissipation ◽  
On Chip ◽  
Ldo Regulator

This paper presents a nano-power Low Drop-Out (LDO) voltage regulator circuit for Radio-Frequency System-on-Chip (RF SoC) applications, this LDO is designed for a smaller dimension due to CMOS technology and in the weak inversion region, can thus be used to minimize power loss of LDO regulator without transientresponse degradation. The proposed structure its low power dissipation make it ideal for RF system-on-chip applications that require low power dissipation under different loading conditions. In order to optimize performance for LDO, the proposed amplifier helps to minimize power of LDO regulators without using any onchip and off-chip compensation capacitors. The output spot noise at 100Hz and 1 kHz are 200nV/sqrt (Hz) and 6nV/sqrt (Hz), respectively. The active area of the circuit is 850 µm2 . The regulator operates with supply voltages from 1.2V to 2V.

scholarly journals A 916 nW Power LDO Regulator Circuit in 90-nm CMOS Technology for RF SoC Applications

2021 ◽  
Vol 19 ◽  
pp. 311-319
Author(s):  
Hicham Akhamal ◽  
Mostafa Chakir ◽  
Hatim Ameziane ◽  
Mohammed, Akhamal ◽  
Kamal Zared ◽  
...  
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
Cmos Technology ◽  
System On Chip ◽  
Drop Out ◽  
Voltage Regulator ◽  
Weak Inversion ◽  
Low Power Dissipation ◽  
On Chip ◽  
Ldo Regulator

This paper presents a nano-power Low Drop-Out (LDO) voltage regulator circuit for RadioFrequency System-on-Chip (RF SoC) applications, this LDO is designed for a smaller dimension due to CMOS technology and in the weak inversion region, can thus be used to minimize power loss of LDO regulator without transient-response degradation. The proposed structure its low power dissipation make it ideal for RF system-on-chip applications that require low power dissipation under different loading conditions. In order to optimize performance for LDO, the proposed amplifier helps to minimize power of LDO regulators without using any on-chip and off-chip compensation capacitors. The power is 916 nW. The output spot noise at 100Hz and 1 kHz are 200nV/sqrt (Hz) and 6nV/sqrt (Hz), respectively. The active area of the circuit is 850 μm2. The regulator operates with supply voltages from 1.2V to 2V

scholarly journals A Fully on Chip Slewrate Enhanced Low Drop-out Voltage Regulator

2015 ◽  
Vol 70 ◽  
pp. 369-376
Author(s):  
Debasish Dwibedy ◽  
Patri Srihari Rao
Keyword(s):  
Drop Out ◽  
Voltage Regulator ◽  
On Chip

scholarly journals Design and Simulation of a Capless Low Drop Out Voltage Regulator

2021 ◽  
pp. 69-75
Author(s):  
Babitha S ◽  
Mr. Hemanth Naidu K J ◽  
Mr. Ashwin Goutham G ◽  
Mr. Harshith S V
Keyword(s):  
High Performance ◽  
Primary Source ◽  
Operating Conditions ◽  
Drop Out ◽  
Voltage Regulator ◽  
Portable Devices ◽  
Current Amplifier ◽  
Power Resources ◽  
Error Amplifier ◽  
The Stability

Portable electronic devices mostly used battery as their primary source for operation hence longer running batteries or Power resources or vital for any portable device need for stable voltage supplies have led to the development of low dropout voltage regulators low dropout regulators provide stable regulated output voltage in various operating conditions which makes it useful in portable devices that design of high performance and stable low dropout voltage regulator is a challenge nowadays with decreasing device size and increasing power densities. The proposed circuit used a 5pack architecture of error amplifier. This paper proposes the study of behavior of the LDO voltage regulator with internal capacitors i.e., capless. The regulated voltage of 1.8V is obtained using the typical power supply of 2.2V obtained dropout voltage of 400mv with the delay of 12.77micro sec, power consumed 1.816W. The proposed design produced DC gain of 31.77db,with the load current variation of 0 to 20mA. The capless LDO architecture is verified in the Cadence 180nm technology. The architecture provides a stable gain and plot for both Temperature and Load Variations. The stability issues are overcome using the compensation techniques which uses a current amplifier and a capacitor in the differentiator configuration. The current amplifier implemented uses current mirror with current copying ratio of unity.

Autotuning of Integrated Inductive Voltage Regulator Using On-Chip Delay Sensor to Tolerate Process and Passive Variations

2019 ◽  
Vol 27 (8) ◽  
pp. 1768-1778 ◽  
Author(s):  
Venkata Chaitanya Krishna Chekuri ◽  
Monodeep Kar ◽  
Arvind Singh ◽  
Saibal Mukhopadhyay
Keyword(s):  
Voltage Regulator ◽  
On Chip
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