A 1.1mA Low Drop-Out Voltage Regulator for System on Chip Applications using 0.18µm CMOS Technology

2018 ◽  
Author(s):  
Cadell Alvares ◽  
Keith Raymond Fernandes
Keyword(s):  
Cmos Technology ◽  
System On Chip ◽  
Drop Out ◽  
Voltage Regulator ◽  
On Chip

scholarly journals Nano-Power Low-Dropout Voltage Regulator Circuit in 90-nm CMOS Technology for RF SoC Applications

2021 ◽  
Vol 15 ◽  
pp. 240-248
Author(s):  
Hicham Akhamal ◽  
Mostafa Chakir ◽  
Hatim Ameziane ◽  
Mohammed Akhamal ◽  
Kamal Zared ◽  
...  
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
Cmos Technology ◽  
System On Chip ◽  
Drop Out ◽  
Voltage Regulator ◽  
Weak Inversion ◽  
Low Power Dissipation ◽  
On Chip ◽  
Ldo Regulator

This paper presents a nano-power Low Drop-Out (LDO) voltage regulator circuit for Radio-Frequency System-on-Chip (RF SoC) applications, this LDO is designed for a smaller dimension due to CMOS technology and in the weak inversion region, can thus be used to minimize power loss of LDO regulator without transientresponse degradation. The proposed structure its low power dissipation make it ideal for RF system-on-chip applications that require low power dissipation under different loading conditions. In order to optimize performance for LDO, the proposed amplifier helps to minimize power of LDO regulators without using any onchip and off-chip compensation capacitors. The output spot noise at 100Hz and 1 kHz are 200nV/sqrt (Hz) and 6nV/sqrt (Hz), respectively. The active area of the circuit is 850 µm2 . The regulator operates with supply voltages from 1.2V to 2V.

scholarly journals A 916 nW Power LDO Regulator Circuit in 90-nm CMOS Technology for RF SoC Applications

2021 ◽  
Vol 19 ◽  
pp. 311-319
Author(s):  
Hicham Akhamal ◽  
Mostafa Chakir ◽  
Hatim Ameziane ◽  
Mohammed, Akhamal ◽  
Kamal Zared ◽  
...  
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
Cmos Technology ◽  
System On Chip ◽  
Drop Out ◽  
Voltage Regulator ◽  
Weak Inversion ◽  
Low Power Dissipation ◽  
On Chip ◽  
Ldo Regulator

This paper presents a nano-power Low Drop-Out (LDO) voltage regulator circuit for RadioFrequency System-on-Chip (RF SoC) applications, this LDO is designed for a smaller dimension due to CMOS technology and in the weak inversion region, can thus be used to minimize power loss of LDO regulator without transient-response degradation. The proposed structure its low power dissipation make it ideal for RF system-on-chip applications that require low power dissipation under different loading conditions. In order to optimize performance for LDO, the proposed amplifier helps to minimize power of LDO regulators without using any on-chip and off-chip compensation capacitors. The power is 916 nW. The output spot noise at 100Hz and 1 kHz are 200nV/sqrt (Hz) and 6nV/sqrt (Hz), respectively. The active area of the circuit is 850 μm2. The regulator operates with supply voltages from 1.2V to 2V

RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

2010 ◽  
Author(s):  
C.-H. Jan ◽  
M. Agostinelli ◽  
H. Deshpande ◽  
M. A. El-Tanani ◽  
W. Hafez ◽  
...  
Keyword(s):  
Cmos Technology ◽  
System On Chip ◽  
Rf Cmos ◽  
Metal Gate ◽  
Technology Scaling ◽  
High K ◽  
On Chip
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