Drain-conductance optimization in nanowire TFETs

Author(s):  
E. Gnani ◽  
S. Reggiani ◽  
A. Gnudi ◽  
G. Baccarani
Keyword(s):  
2020 ◽  
Vol 65 ◽  
pp. 39-50
Author(s):  
N. Bora ◽  
N. Deka ◽  
R. Subadar

This paper presents an analytical model of various electrical parameters for an ultra thin symmetric double gate (SDG) junctionless field effect nanowire transistor (JLFENT). The model works for all the regions of operation of the nanowire transistor without using any fitting parameter. The surface potential is derived based on the solutions of Poisson’s and current continuity equations by using appropriate boundary conditions. The Pao–Sah double integral was used to obtain the drain current, transconductance and drain conductance. The results obtained from analytical model are validated by comparing with GENIUS 3D TCAD simulations. The simplicity of the model makes it appropriate to be a SPICE compatible model.


2005 ◽  
Author(s):  
Hirohisa Taguchi ◽  
Maki Hayakawa ◽  
Yuki Nakamura ◽  
Tsutomu Iida ◽  
Yoshifumi Takanashi

2015 ◽  
Author(s):  
T. Ide ◽  
M. Shimizu ◽  
X.Q. Shen ◽  
T. Morita ◽  
N. Otsuka ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document