A Comparative Analysis of Charge Pump Circuits for Improved Output Voltage Near Subthreshold Region

Author(s):  
Hitesh Thawani ◽  
Shruti Agarwal ◽  
Monica Gupta
2017 ◽  
Vol 26 (12) ◽  
pp. 1750196 ◽  
Author(s):  
Yanzhao Ma ◽  
Yinghui Zou ◽  
Shengbing Zhang ◽  
Xiaoya Fan

A fully-integrated self-startup circuit with ultra-low voltage for thermal energy harvesting is presented in this paper. The converter is composed of an enhanced swing LC oscillator and a charge pump with decreased equivalent input capacitance. The LC oscillator has ultra-low input voltage and high output voltage swing, and the charge pump has a fast charging speed and small equivalent input capacitance. This circuit is designed with 0.18[Formula: see text][Formula: see text]m standard CMOS process. The simulation results show that the output voltage is in the range of 0.14[Formula: see text]V and 2.97[Formula: see text]V when the input voltage is changed from 50[Formula: see text]mV to 150[Formula: see text]mV. The output voltage could reach 2.87[Formula: see text]V at the input voltage of 150[Formula: see text]mV and the load of 1[Formula: see text]M[Formula: see text]. The maximum efficiency is in the range of 10.0% and 14.8% when the input voltage is changed from 0.2[Formula: see text]V to 0.4[Formula: see text]V. The circuit is suitable for thermoelectric energy harvesting to start with ultra-low input voltage.


Sensors ◽  
2019 ◽  
Vol 19 (19) ◽  
pp. 4149
Author(s):  
Xiang Li ◽  
Rui Li ◽  
Chunge Ju ◽  
Bo Hou ◽  
Qi Wei ◽  
...  

Micromachined gyroscopes require high voltage (HV) for actuation and detection to improve its precision, but the deviation of the HV caused by temperature fluctuations will degrade the sensor’s performance. In this paper, a high-voltage temperature-insensitive charge pump is proposed. Without adopting BCD (bipolar-CMOS-DMOS) technology, the output voltage can be boosted over the breakdown voltage of n-well/substrate diode using triple-well NMOS (n-type metal-oxide-semiconductor) transistors. By controlling the pumping clock’s amplitude continuously, closed-loop regulation is realized to reduce the output voltage’s sensitivity to temperature changes. Besides, the output level is programmable linearly in a large range by changing the reference voltage. The whole circuit has been fabricated in a 0.18- μ m standard CMOS (complementary metal-oxide-semiconductor) process with a total area of 2.53 mm 2 . Measurements indicate that its output voltage has a linear adjustable range from around 13 V to 16.95 V, and temperature tests show that the maximum variations of the output voltage at − 40 ∼ 80 ∘ C are less than 1.1%.


Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2321
Author(s):  
Mohammad Tayyab ◽  
Adil Sarwar ◽  
Irfan Khan ◽  
Mohd Tariq ◽  
Md Reyaz Hussan ◽  
...  

A new triple voltage boosting switched-capacitor multilevel inverter (SCMLI) is presented in this paper. It can produce 13-level output voltage waveform by utilizing 12 switches, three diodes, three capacitors, and one DC source. The capacitor voltages are self-balanced as all the three capacitors present in the circuit are connected across the DC source to charge it to the desired voltage level for several instants in one fundamental cycle. A detailed comparative analysis is carried to show the advantages of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), and boosting of the converter with the recently published 13-level topologies. The nearest level control (NLC)-based algorithm is used for generating switching signals for the IGBTs present in the circuit. The TSV of the proposed converter is 22. Experimental results are obtained for different loading conditions by using a laboratory hardware prototype to validate the simulation results. The efficiency of the proposed inverter is 97.2% for a 200 watt load.


2019 ◽  
Vol 29 (01) ◽  
pp. 2050013
Author(s):  
Najmeh Cheraghi Shirazi ◽  
Abumoslem Jannesari ◽  
Pooya Torkzadeh

A new self-start-up switched-capacitor charge pump is proposed for low-power, low-voltage and battery-less implantable applications. To minimize output voltage ripple and improve transient response, interleaving regulation technique is applied to a multi-stage Cross-Coupled Charge Pump (CCCP) circuit. It splits the power flow in a time-sequenced manner. Three cases of study are designed and investigated with body-biasing technique by auxiliary transistors: Four-stage Two-Branch CCCP (TBCCCP), the two-cell four-stage Interleaved Two-Branch CCCP (ITBCCCP2) and four-cell four-stage Interleaved Two-Branch CCCP (ITBCCCP4). Multi-phase nonoverlap clock generator circuit with body-biasing technique is also proposed which can operate at voltages as low as CCCP circuits. The proposed circuits are designed with input voltage as low as 300 to 400[Formula: see text]mV and 20[Formula: see text]MHz clock frequency for 1[Formula: see text]pF load capacitance. Among the three designs, ITBCCCP4 has the lowest ramp-up time (41.6% faster), output voltage ripple (29% less) and power consumption (19% less). The Figure-Of-Merit (FOM) of ITBCCCP4 is the highest value among two others. For 400[Formula: see text]mV input voltage, ITBCCCP4 has a 98.3% pumping efficiency within 11.6[Formula: see text][Formula: see text]s, while having a maximum voltage ripple of 0.1% and a power consumption as low as 2.7[Formula: see text]nW. The FOM is 0.66 for this circuit. The designed circuits are implemented in 180-nm standard CMOS technology with an effective chip area of [Formula: see text][Formula: see text][Formula: see text]m for TBCCCP, [Formula: see text][Formula: see text][Formula: see text]m for ITBCCCP2 and [Formula: see text][Formula: see text][Formula: see text]m for ITBCCCP4.


Sign in / Sign up

Export Citation Format

Share Document