High electron and hole mobility enhancements in thin-body strained Si/strained SiGe/strained Si heterostructures on insulator

Author(s):  
I. Aberg ◽  
C.N. ChIeirigh ◽  
O.O. Olubuyide ◽  
X. Duan ◽  
J.L. Hoyt
2004 ◽  
Vol 19 (5) ◽  
pp. L48-L51 ◽  
Author(s):  
Zhiyuan Cheng ◽  
Jongwan Jung ◽  
Minjoo L Lee ◽  
Arthur J Pitera ◽  
Judy L Hoyt ◽  
...  

2011 ◽  
Vol 110-116 ◽  
pp. 5447-5451
Author(s):  
Shan Shan Qin ◽  
He Ming Zhang ◽  
Hui Yong Hu ◽  
Xiao Yan Wang ◽  
Guan Yu Wang

Threshold voltage models for both buried channel and surface channel for the dual-channel strained Si/strained Si1-xGex/relaxd Si1-yGey(s-Si/s-SiGe/Si1-yGey) p-type metal-oxide-semiconductor field-effect transistor (PMOSFET) are presented in this paper. And the maximum allowed thickness of s-Si is given, which can ensure that the strong inversion appears earlier in the buried channel (compressive strained SiGe) than in the surface channel, because the hole mobility in the buried channel is higher than that the surface channel. They offer a good accuracy as compared with the results of device simulator ISE.


2001 ◽  
Vol 686 ◽  
Author(s):  
Shin-ichi Takagi ◽  
Tsutomu Tezuka ◽  
Naoharu Sugiyama ◽  
Tomohisa Mizuno ◽  
Atsushi Kurobe

Abstrct:Strained-Si MOSFET is an attractive device structure to be able to relax several fundamental limitations of CMOS scaling, because of high electron and hole mobility and compatibility with Si CMOS standard processing. In this paper, we present a new device structure including strained-Si channel, strained-SOI MOSFET, applicable to CMOS under sub-100 nm technology nodes. The main feature of this device is that thin strained-Si channel/relaxed SiGe hetero-structures are formed on buried oxides. The principle and the advantages are described in detail. The strained-SOI MOSFETs, whose electron and hole mobility is 1.6 and 1.3 times, respectively, higher than in conventional MOSFETs, have successfully been fabricated by combining the SIMOX technology with re-growth of strained Si films. We also present novel fabrication techniques to realize ultra-thin SiGe-on-Insulator (SGOI) virtual substrates with high Ge content, including Ge condensation due to oxidation of SGOI with lower Ge content. Strained-Si/SGOI structures with total thickness of 21 nm and Ge content of 56 % have been fabricated by oxidizing SiGe films on conventional SOI substrates and re-growing strained-Si films.


Author(s):  
R. Bijesh ◽  
I. Ok ◽  
M. Baykan ◽  
C. Hobbs ◽  
P. Majhi ◽  
...  
Keyword(s):  

2019 ◽  
Author(s):  
K. Arimoto ◽  
N. Utsuyama ◽  
S. Mitsui ◽  
K. Satoh ◽  
T. Yamada ◽  
...  
Keyword(s):  

Nanoscale ◽  
2018 ◽  
Vol 10 (45) ◽  
pp. 21062-21068 ◽  
Author(s):  
Xiaolong Zhang ◽  
Wipakorn Jevasuwan ◽  
Ken C. Pradel ◽  
Thiyagu Subramani ◽  
Toshiaki Takei ◽  
...  

p-Si/i-Ge core–shell and p-Si/i-Ge/p-Si core–double shell nanowires are fabricated using CVD with vapor–liquid–solid growth methods. Selective doping and sharp interfaces between the Si core and the Ge shell are achieved, which can provide a feasible design for realizing high electron (hole) mobility transistors.


1998 ◽  
Vol 4 (S2) ◽  
pp. 794-795
Author(s):  
P.E. Batson

High electron mobility structures have been built for several years now using strained silicon layers grown on SixGe(1-x) with x in the 25-40% range. In these structures, a thin layer of silicon is grown between layers of unstrained GeSi alloy. Matching of the two lattices in the plane of growth produces a bi-axial strain in the silicon, splitting the conduction band and providing light electron levels for enhanced mobility. If the silicon channel becomes too thick, strain relaxation can occur by injection of misfit dislocations at the growth interface between the silicon and GeSi alloy. The strain field of these dislocations then gives rise to a local potential variation that limits electron mobility in the strained Si channel. This study seeks to verify this mechanism by measuring the absolute conduction band shifts which track the local potential near the misfit dislocations.


2009 ◽  
Vol 156-158 ◽  
pp. 173-180 ◽  
Author(s):  
Nicholas S. Bennett ◽  
Chihak Ahn ◽  
Nicholas E.B. Cowern ◽  
Peter Pichler

We present a review of both theoretical and experimental studies of stress effects on the solubility of dopants in silicon and silicon-germanium materials. Critical errors and limitations in early theory are discussed, and a recent treatment incorporating charge carrier induced lattice strain and correct statistics is presented. Considering all contributing effects, the strain compensation energy is the primary contribution to solubility enhancement in both silicon and silicon-germanium for dopants of technological interest. An exception is the case of low-solubility dopants, where a Fermi level contribution is also found. Explicit calculations for a range of dopant impurities in Si are presented that agree closely with experimental findings for As, Sb and B in strained Si. The theoretical treatment is also applied to account for stress effects in strained SiGe structures, which also show close correlation with recently derived experimental results for B-doped strained SiGe which are presented here for the first time.


2009 ◽  
Vol 30 (10) ◽  
pp. 104001 ◽  
Author(s):  
Zhao Shuo ◽  
Guo Lei ◽  
Wang Jing ◽  
Xu Jun ◽  
Liu Zhihong

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