scholarly journals Analytical study of on-chip generations of analog sine-wave based on combined digital signals

2017 ◽  
Author(s):  
Stephane David-Grignot ◽  
Achraf Lamlih ◽  
Vincent Kerzerho ◽  
Florence Azaıs ◽  
Fabien Soulier ◽  
...  
Keyword(s):  
Analytical Study ◽  
Sine Wave ◽  
Digital Signals ◽  
On Chip

scholarly journals On-chip Generation of Sine-wave Summing Digital Signals: an Analytic Study Considering Implementation Constraints

2018 ◽  
Vol 34 (3) ◽  
pp. 281-290
Author(s):  
Stephane David-Grignot ◽  
Achraf Lamlih ◽  
Mohamed Moez Belhaj ◽  
Vincent Kerzérho ◽  
Florence Azaïs ◽  
...  
Keyword(s):  
Sine Wave ◽  
Analytic Study ◽  
Digital Signals ◽  
On Chip

An Analytical Study on Jitter Accumulation in Interleaved Phase Frequency Detectors for High-Accuracy On-Chip Jitter Measurements

2013 ◽  
Vol 534 ◽  
pp. 197-205
Author(s):  
Kiichi Niitsu ◽  
Masato Sakurai ◽  
Naohiro Harigai ◽  
Daiki Hirabayashi ◽  
Daiki Oki ◽  
...  
Keyword(s):  
Power Supply ◽  
Analytical Study ◽  
Cmos Technology ◽  
High Accuracy ◽  
Spice Simulation ◽  
Supply Noise ◽  
Noise Injection ◽  
Simulation Results ◽  
On Chip ◽  
Frequency Detector

This work presents the analytical study on jitter accumulation in interleaved phase frequency detectors for high-accuracy on-chip jitter measurements. Jitter accumulation in phase frequency detector degrades the accuracy of on-chip jitter measurements, and required to be mitigated. In order to analyze and estimate the jitter accumulation in phase frequency detectors, SPICE simulation was performed with 65 nm CMOS technology. Simulation results show that, with a 50 mV power supply noise injection, jitter accumulation can be reduced from 1.03 ps to 0.49 ps (52% reduction) by using an interleaved architecture.

Arithmetic Implementation of FSK Based on DSP

2013 ◽  
Vol 443 ◽  
pp. 31-34
Author(s):  
Ming Quan Shi
Keyword(s):  
Information Transmission ◽  
Data Transmission ◽  
Sine Wave ◽  
Modulation Scheme ◽  
Digital Signals ◽  
Graphic Display ◽  
Low Speed ◽  
Speed Data Transmission

FSK is a prior modulation scheme in the information transmission. It has many advantages such as convenience to realize, anti-noise and antiattenuation, so it is widely used in middle and low-speed data transmission. This paper designed a FSK system based on TMS320VC5402 DSP, The scenario analysed the arithmetic of FSK and realized it using C. This system produced FSK signal using keying. That means, two sine waves which have different independent frequencies represented the 0s and 1s of digital signals respectively, the data of one sine wave was composed of 64 points. The arithmetic stored the modulation data at a specific address; the author can observe the output wave by graphic display tools. Finally, the author verifies the accuracy and feasibility of this FSK system.

scholarly journals Spontaneous Neuronal Signaling is Inherently Musical and Mathematical: Insight into the Universal Human Affinity for Music

2018 ◽  
Vol 12 (1) ◽  
pp. 64-68
Author(s):  
Thomas B. Shea ◽  
Ruth Remington
Keyword(s):  
Neuronal Networks ◽  
Ex Vivo ◽  
Sine Wave ◽  
Digital Signals ◽  
Electrode Arrays ◽  
Music And Mathematics ◽  
And Mathematics ◽  
Audio Files ◽  
The Relationship ◽  
Insight Into

Objective:Audio files of spontaneous signal streams generated byex vivoneuronal networks cultured on multi-electrode arrays generated an oscillating sine wave with an inherent musical quality. This was not anticipated considering that synaptic signals are “all - or – none”, and therefore digital, events.Methods:These findings may provide insight into why music can be perceived as pleasurable and invoke a calm mood despite that music is ultimately perceived and stored as a series of digital signals; it is speculated that music may reinforce and/or enhance this spontaneous digital stream.Results and Conclusion:These findings also support the relationship between music and mathematics.

Design of DFB Laser Drive and Temperature Control Circuit in TDLAS Gas Concentration Detection

2020 ◽  
Author(s):  
Haoqing Yang ◽  
Xiongzhu Bu ◽  
Yihan Cao ◽  
Yang Song
Keyword(s):  
Temperature Control ◽  
Detection System ◽  
Current Source ◽  
Sine Wave ◽  
Control Circuit ◽  
Constant Current ◽  
Temperature Control System ◽  
Constant Current Source ◽  
Dfb Laser ◽  
On Chip

Abstract In order to satisfy the requirements of TDLAS gas measurement, the DFB laser drive and temperature control system is designed with taking STM32F103RCT6 as the main control chip, including sine wave and sawtooth signal generation circuit, temperature acquisition circuit and temperature control circuit, etc. The sine wave and the sawtooth wave signal are respectively generated by using the DDS chip and the STM32 on-chip DAC, and the two are superimposed to control the constant current source to drive the laser. At the same time, the internal temperature of the laser is collected and controlled. The DFB laser with a center wavelength of 1653.7 nm is used to verify the CH4. The experiment proves that the system can generate stable laser driving signals and achieve precise temperature control. The temperature control accuracy can reach ±0.013 °C. The design satisfies the requirements of TDLAS gas detection system for laser driving and temperature control.

On-chip sine-wave noise generator for analog IP noise tolerance measurements

2010 ◽  
Author(s):  
M Soda ◽  
Y Bando ◽  
S Takaya ◽  
T Ohkawa ◽  
T Takaramoto ◽  
...  
Keyword(s):  
Sine Wave ◽  
Noise Generator ◽  
Noise Tolerance ◽  
On Chip

scholarly journals A new BIST scheme for low-power and high-resolution DAC testing

2003 ◽  
Vol 1 ◽  
pp. 289-293
Author(s):  
H. Li ◽  
J. Eckmueller ◽  
S. Sattler ◽  
H. Eichfeld ◽  
R. Weigel
Keyword(s):  
High Resolution ◽  
Low Power ◽  
Digital Filter ◽  
Narrow Band ◽  
Digital Signals ◽  
Software Simulation ◽  
Chip Testing ◽  
On Chip

Abstract. A BIST scheme for testing on chip DAC is presented in this paper. We discuss the generation of on chip testing stimuli and the measurement of digital signals with a narrow-band digital filter. We validate the scheme with software simulation and point out the possibility of ADC BIST with verified DACicus-journals.

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