AbstractPhysical and statistical models have been used extensively to understand and improve electromigration and stress migration induced damage in narrow metal interconnects. As devices continue to shrink, and the interconnect delay becomes a more important fraction of overall circuit delay, the semiconductor industry has begun to make several important changes to the ‘standard’ Al-based interconnect technologies, including (i) a move from metal deposition and metal etch to metal deposition into damascene and dual-damascene structures, (ii) a move from Al-based to Cu-based metallizations, and (iii) a move from oxide to low-k dielectrics between the metal interconnects. The dominant electromigration and stress migration failure mechanisms associated with these advanced interconnect structures are typically different from the failure mechanisms associated with standard Al-based interconnects. In this work, physical and statistical models are used in conjunction with reliability data to compare the failure mechanisms in standard, Al-based interconnects with Cu-based, damascene interconnects. Methods are discussed for determining the dominant failure mechanisms and improving reliability in both types of interconnect.
Dielectric failure mechanisms in advanced Cu/low-k interconnect architecture
