Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltages

2002 ◽  
Author(s):  
R. Balczewski ◽  
R. Harjani
Keyword(s):  
High Efficiency ◽  
Capacitive Voltage ◽  
Supply Voltages ◽  
On Chip

scholarly journals On-chip trans-dimensional plasmonic router

Nanophotonics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 3357-3365 ◽  
Author(s):  
Shaohua Dong ◽  
Qing Zhang ◽  
Guangtao Cao ◽  
Jincheng Ni ◽  
Ting Shi ◽  
...  
Keyword(s):  
High Speed ◽  
High Efficiency ◽  
Incident Angle ◽  
Reciprocal Lattice ◽  
Plasmonic Waveguide ◽  
Optical Diffraction ◽  
Local Dynamic ◽  
Phase Gradient ◽  
On Chip ◽  
Plasmon Polaritons

AbstractPlasmons, as emerging optical diffraction-unlimited information carriers, promise the high-capacity, high-speed, and integrated photonic chips. The on-chip precise manipulations of plasmon in an arbitrary platform, whether two-dimensional (2D) or one-dimensional (1D), appears demanding but non-trivial. Here, we proposed a meta-wall, consisting of specifically designed meta-atoms, that allows the high-efficiency transformation of propagating plasmon polaritons from 2D platforms to 1D plasmonic waveguides, forming the trans-dimensional plasmonic routers. The mechanism to compensate the momentum transformation in the router can be traced via a local dynamic phase gradient of the meta-atom and reciprocal lattice vector. To demonstrate such a scheme, a directional router based on phase-gradient meta-wall is designed to couple 2D SPP to a 1D plasmonic waveguide, while a unidirectional router based on grating metawall is designed to route 2D SPP to the arbitrarily desired direction along the 1D plasmonic waveguide by changing the incident angle of 2D SPP. The on-chip routers of trans-dimensional SPP demonstrated here provide a flexible tool to manipulate propagation of surface plasmon polaritons (SPPs) and may pave the way for designing integrated plasmonic network and devices.

scholarly journals Development of a Mobile Analytical Chemistry Workstation Using a Silicon Electrochromatography Microchip and Capacitively Coupled Contactless Conductivity Detector

Micromachines ◽  
2021 ◽  
Vol 12 (3) ◽  
pp. 239
Author(s):  
Yineng Wang ◽  
Xi Cao ◽  
Walter Messina ◽  
Anna Hogan ◽  
Justina Ugwah ◽  
...  
Keyword(s):  
Capillary Electrochromatography ◽  
High Efficiency ◽  
Device Fabrication ◽  
Capacitively Coupled ◽  
Packaging Design ◽  
Design And Optimization ◽  
Nanofabrication Technique ◽  
On Chip ◽  
Silicon Based ◽  
Rapid Separations

Capillary electrochromatography (CEC) is a separation technique that hybridizes liquid chromatography (LC) and capillary electrophoresis (CE). The selectivity offered by LC stationary phase results in rapid separations, high efficiency, high selectivity, minimal analyte and buffer consumption. Chip-based CE and CEC separation techniques are also gaining interest, as the microchip can provide precise on-chip control over the experiment. Capacitively coupled contactless conductivity detection (C4D) offers the contactless electrode configuration, and thus is not in contact with the solutions under investigation. This prevents contamination, so it can be easy to use as well as maintain. This study investigated a chip-based CE/CEC with C4D technique, including silicon-based microfluidic device fabrication processes with packaging, design and optimization. It also examined the compatibility of the silicon-based CEC microchip interfaced with C4D. In this paper, the authors demonstrated a nanofabrication technique for a novel microchip electrochromatography (MEC) device, whose capability is to be used as a mobile analytical equipment. This research investigated using samples of potassium ions, sodium ions and aspirin (acetylsalicylic acid).

Parallel-Pipelined Video Processing in Multicore Heterogeneous Systems on Chip

2021 ◽  
Vol 26 (2) ◽  
pp. 172-183
Author(s):  
E.S. Yanakova ◽  
◽  
G.T. Macharadze ◽  
L.G. Gagarina ◽  
A.A. Shvachko ◽  
...  
Keyword(s):  
Video Processing ◽  
High Efficiency ◽  
Heterogeneous Systems ◽  
Video Data ◽  
System Level ◽  
Video Information ◽  
Systems On Chip ◽  
The Face ◽  
Parallel Pipelined ◽  
On Chip

A turn from homogeneous to heterogeneous architectures permits to achieve the advantages of the efficiency, size, weight and power consumption, which is especially important for the built-in solutions. However, the development of the parallel software for heterogeneous computer systems is rather complex task due to the requirements of high efficiency, easy programming and the process of scaling. In the paper the efficiency of parallel-pipelined processing of video information in multiprocessor heterogeneous systems on a chip (SoC) such as DSP, GPU, ISP, VDP, VPU and others, has been investigated. A typical scheme of parallel-pipelined processing of video data using various accelerators has been presented. The scheme of the parallel-pipelined video data on heterogeneous SoC 1892VM248 has been developed. The methods of efficient parallel-pipelined processing of video data in heterogeneous computers (SoC), consisting of the operating system level, programming technologies level and the application level, have been proposed. A comparative analysis of the most common programming technologies, such as OpenCL, OpenMP, MPI, OpenAMP, has been performed. The analysis has shown that depend-ing on the device finite purpose two programming paradigms should be applied: based on OpenCL technology (for built-in system) and MPI technology (for inter-cell and inter processor interaction). The results obtained of the parallel-pipelined processing within the framework of the face recognition have confirmed the effectiveness of the chosen solutions.

High Efficiency On-Chip Single-Photon Detection for Diamond Nanophotonic Circuits

2016 ◽  
Vol 34 (2) ◽  
pp. 249-255 ◽  
Author(s):  
Oliver Kahl ◽  
Simone Ferrari ◽  
Patrik Rath ◽  
Andreas Vetter ◽  
Christoph Nebel ◽  
...  
Keyword(s):  
High Efficiency ◽  
Single Photon ◽  
Single Photon Detection ◽  
Photon Detection ◽  
Nanophotonic Circuits ◽  
On Chip

scholarly journals High-Efficiency All-Dielectric Metasurfaces for the Generation and Detection of Focused Optical Vortex for the Ultraviolet Domain

2020 ◽  
Vol 10 (16) ◽  
pp. 5716
Author(s):  
Ziheng Zhang ◽  
Tong Li ◽  
Xiaofei Jiao ◽  
Guofeng Song ◽  
Yun Xu
Keyword(s):  
High Performance ◽  
High Efficiency ◽  
Dielectric Material ◽  
Optical Vortex ◽  
Magnetic Dipoles ◽  
Half Wave ◽  
Potential Applications ◽  
On Chip ◽  
High Flexibility ◽  
Meta Atom

The optical vortex (OV) has drawn considerable attention owing to its tremendous advanced applications, such as optical communication, quantum entanglement, and on-chip detectors. However, traditional OV generators suffer from a bulky configuration and limited performance, especially in the ultraviolet range. In this paper, we utilize a large bandgap dielectric material, niobium pentoxide (Nb2O5), to construct ultra-thin and compact transmission-type metasurfaces to generate and detect the OV at a wavelength of 355 nm. The meta-atom, which operates as a miniature half-wave plate and demonstrates a large tolerance to fabrication error, manipulates the phase of an incident right-handed circular polarized wave with high cross-polarized conversion efficiency (around 86.9%). The phase delay of π between the orthogonal electric field component is attributed to the anti-parallel magnetic dipoles induced in the nanobar. Besides, focused vortex generation (topological charge l from 1 to 3) and multichannel detection (l from −2 to 2) are demonstrated with high efficiency, up to 79.2%. We envision that our devices of high flexibility may have potential applications in high-performance micron-scale integrated ultraviolet nanophotonics and meta-optics.

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