A 32nm tunnel FET SRAM for ultra low leakage

Abstract The promising capability of Triple Material Surrounding Gate Junctionless Tunnel FET (TMSG – JL – TFET)based 6T SRAM structure is demonstrated by employing Germanium (Ge)and High-K gate dielectric material. The high – K insulation guarantees the proposed device to be used in low leakage memory systems. The corresponding analytical model is developed to extract various device parameters such as surface potential, electric field and threshold voltage. The results yield minimization of hot carrier effects at the drain end, when compared to conventional Silicon (Si) based tunnel FETs (TFETs). Further, the ambipolar characteristics of the proposed device is explored and 6T Ge – TMS – SG – JL – TFET based SRAM design is proposed. The results are compared with CMOS based SRAM and the analytical model presented is validated using 3D-TCAD ATLAS simulation, which ensures the accuracy and exactness of the developed model.

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Triple Metal Surrounding Gate Junctionless Tunnel FET Based 6T SRAM Design for Low Leakage Memory System

Silicon ◽

10.1007/s12633-021-01075-7 ◽

2021 ◽

Author(s):

G. Lakshmi Priya ◽

M. Venkatesh ◽

N. B. Balamurugan ◽

T. S. Arun Samuel

Keyword(s):

Memory System ◽

Low Leakage ◽

Tunnel Fet ◽

Sram Design ◽

Surrounding Gate

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A Large “Read” and “Write” Margins, Low Leakage Power, Six-Transistor 90-nm CMOS SRAM

IEICE Transactions on Electronics ◽

10.1587/transele.e94.c.530 ◽

2011 ◽

Vol E94-C (4) ◽

pp. 530-538

Author(s):

Tadayoshi ENOMOTO ◽

Nobuaki KOBAYASHI

Keyword(s):

Leakage Power ◽

Low Leakage

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Integrated ESD Robustness through Device Analysis of Ultra-Small Low Voltage Power MOSFETs

ISTFA 2014: Conference Proceedings from the 40th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2014p0350 ◽

2014 ◽

Author(s):

Ian Kearney ◽

Hank Sung

Keyword(s):

New Product Development ◽

Silicon Oxide ◽

Low Voltage ◽

Photon Emission ◽

Electrical Characterization ◽

Power Mosfets ◽

Low Leakage ◽

A Cell ◽

Thermographic Analysis ◽

Voltage Spike

Abstract Low voltage power MOSFETs often integrate voltage spike protection and gate oxide ESD protection. The basic concept of complete-static protection for the power MOSFETs is the prevention of static build-up where possible and the quick, reliable removal of existing charges. The power MOSFET gate is equivalent to a low voltage low leakage capacitor. The capacitor plates are formed primarily by the silicon gate and source metallization. The capacitor dielectric is the silicon oxide gate insulation. Smaller devices have less capacitance and require less charge per volt and are therefore more susceptible to ESD than larger MOSFETs. A FemtoFETTM is an ultra-small, low on-resistance MOSFET transistor for space-constrained handheld applications, such as smartphones and tablets. An ESD event, for example, between a fingertip and the communication-port connectors of a cell phone or tablet may cause permanent system damage. Through electrical characterization and global isolation by active photon emission, the authors identify and distinguish ESD failures. Thermographic analysis provided additional insight enabling further separation of ESD failmodes. This paper emphasizes the role of failure analysis in new product development from the create phase through to product ramp. Coupled with device electrical simulation, the analysis observations led to further design enhancement.

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Low Leakage Sequential MTCMOS Shift Register for Mitigation of Ground Fluctuations Noise During Complete Reactivation Process

SSRN Electronic Journal ◽

10.2139/ssrn.3171516 ◽

2018 ◽

Author(s):

Anjan Kumar ◽

Devendra Chack ◽

Manisha Pattanaik

Keyword(s):

Shift Register ◽

Low Leakage ◽

Reactivation Process

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Optimization of sol-gel based fibre-optic cholinesterase biosensor for the determination of organophosphorus pesticides

Water Science & Technology ◽

10.2166/wst.2000.0580 ◽

2000 ◽

Vol 42 (7-8) ◽

pp. 283-290 ◽

Cited By ~ 8

Author(s):

H.-C. Tsai ◽

R.-A. Doong

Keyword(s):

Fiber Optic ◽

Ph Value ◽

Rapid Determination ◽

Organophosphorus Pesticides ◽

Sol Gel ◽

Neutral Red ◽

Fluorescent Indicators ◽

Low Leakage ◽

Fiber Optic System

A sol-gel based fiber-optic biosensor with acetylcholinesterase as the biorecognition element has been developed for the rapid determination of organophosphorus pesticides. Nine fluorescent indicators, acridine, acridine orange, neutral red, DAPI, rhodamine B, fluorescein, umbelliferone, FITC on celite and FITC-dextran, have been examined to optimize the fiber-optic system. Results showed that acridine and FITCs were sensitive to the change of pH value caused by the enzyme-substrate catalysis reaction. However, the sensitivity of acridine was 260 times lower than that of FITCs. Higher toxicity of acridine to acetylcholinesterase than FITC was also observed. Moreover, the high-molecular-weight FITC-dextran showed low leakage rate when immobilizing using sol-gel technology, showing that the FITC-dextran was a suitable pH sensitive fluorescent indicator for the OPPs biosensor. The response of the fiber-optic biosensor to the substrate, acetylcholine, was highly reproducible (RSD=3.5%). A good linearity of acetylcholine in the range from 0.5 to 20 mM was also obtained (R2=0.98). Furthermore, a 30% inhibition can be achieved in 30min when 152 ppb paraoxon was added into the system. The results show the possibility for real-time determination of organophosphorus pesticides by using the biosensor developed in this study.

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