Triple Metal Surrounding Gate Junctionless Tunnel FET based 6T SRAM Design For Low Leakage Memory System

Abstract The promising capability of Triple Material Surrounding Gate Junctionless Tunnel FET (TMSG – JL – TFET)based 6T SRAM structure is demonstrated by employing Germanium (Ge)and High-K gate dielectric material. The high – K insulation guarantees the proposed device to be used in low leakage memory systems. The corresponding analytical model is developed to extract various device parameters such as surface potential, electric field and threshold voltage. The results yield minimization of hot carrier effects at the drain end, when compared to conventional Silicon (Si) based tunnel FETs (TFETs). Further, the ambipolar characteristics of the proposed device is explored and 6T Ge – TMS – SG – JL – TFET based SRAM design is proposed. The results are compared with CMOS based SRAM and the analytical model presented is validated using 3D-TCAD ATLAS simulation, which ensures the accuracy and exactness of the developed model.

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Triple Metal Surrounding Gate Junctionless Tunnel FET Based 6T SRAM Design for Low Leakage Memory System

Silicon ◽

10.1007/s12633-021-01075-7 ◽

2021 ◽

Author(s):

G. Lakshmi Priya ◽

M. Venkatesh ◽

N. B. Balamurugan ◽

T. S. Arun Samuel

Keyword(s):

Memory System ◽

Low Leakage ◽

Tunnel Fet ◽

Sram Design ◽

Surrounding Gate

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The Influence of Defects and Impurities on Electrical Properties of High-k Dielectrics

Materials Science Forum ◽

10.4028/www.scientific.net/msf.608.55 ◽

2008 ◽

Vol 608 ◽

pp. 55-109 ◽

Cited By ~ 3

Author(s):

Jaroslaw Dąbrowski ◽

Seiichi Miyazaki ◽

S. Inumiya ◽

G. Kozłowski ◽

G. Lippert ◽

...

Keyword(s):

Electrical Properties ◽

Carrier Transport ◽

Dielectric Material ◽

Electrical Breakdown ◽

Charge Trapping ◽

Basic Knowledge ◽

Dielectric Films ◽

Low Leakage ◽

High K ◽

High K Dielectric

Electrical properties of thin high-k dielectric films are influenced (or even governed) by the presence of macroscopic, microscopic and atomic-size defects. For most applications, a structurally perfect dielectric material with moderate parameters would have sufficiently low leakage and sufficiently long lifetime. But defects open new paths for carrier transport, increasing the currents by orders of magnitude, causing instabilities due to charge trapping, and promoting the formation of defects responsible for electrical breakdown events and for the failure of the film. We discuss how currents flow across the gate stack and how damage is created in the material. We also illustrate the contemporary basic knowledge on hazardous defects (including certain impurities) in high-k dielectrics using the example of a family of materials based on Pr oxides. As an example of the influence of stoichiometry on the electrical pa-rameters of the dielectric, we analyze the effect of nitrogen incorporation into ultrathin Hf silicate films.

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Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric

Solid-State Electronics ◽

10.1016/j.sse.2007.09.014 ◽

2007 ◽

Vol 51 (11-12) ◽

pp. 1500-1507 ◽

Cited By ~ 132

Author(s):

Kathy Boucart ◽

Adrian Mihai Ionescu

Keyword(s):

Gate Dielectric ◽

Double Gate ◽

Tunnel Fet ◽

High K ◽

Length Scaling ◽

High K Gate Dielectric

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High-k Materials for Advanced Gate Stack Dielectrics: a Comparison of ALCVD and MOCVD as Deposition Technologies

MRS Proceedings ◽

10.1557/proc-765-d2.6 ◽

2003 ◽

Vol 765 ◽

Cited By ~ 6

Author(s):

Matty Caymax ◽

H. Bender ◽

B. Brijs ◽

T. Conard ◽

S. DeGendt ◽

...

Keyword(s):

Physical Vapor Deposition ◽

Gate Dielectric ◽

Dielectric Material ◽

Dielectric Constants ◽

Gate Stack ◽

Interfacial Layers ◽

High K ◽

High K Materials ◽

Gate Dielectric Material ◽

Deposition Techniques

AbstractIn the quest for ever smaller transistor dimensions, the well-known and reliable SiO2 gate dielectric material needs to be replaced by alternatives whith higher dielectric constants in order to reduce the gate leakage. Candidate materials are metal oxides such as HfO2. Themost promising deposition techniques, next to Physical Vapor Deposition, appear to be ALCVD and MOCVD. In this paper, we compare the most important characteristics of layers from both proces techniques and assess their relevance to gate stack applications: density, crystallisation, impurities, growth mechanism, interfacial layers, dielectric constant, mobility. Although we find some minor differences, layers from both techniques mostly show striking similarities in many aspects, both positive and negative.

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Study on ZrO2 Deposited Directly on Si as an Alternative Gate Dielectric Material

MRS Proceedings ◽

10.1557/proc-606-263 ◽

1999 ◽

Vol 606 ◽

Cited By ~ 1

Author(s):

Wen-Jie Qi ◽

Renee Nieh ◽

Byoung Hun Lee ◽

Youngjoo Jeon ◽

Laegu Kang ◽

...

Keyword(s):

Photoelectron Spectroscopy ◽

Gate Dielectric ◽

Dielectric Breakdown ◽

Dielectric Material ◽

Oxide Thickness ◽

Amorphous Structure ◽

Flat Band ◽

Equivalent Oxide Thickness ◽

Low Leakage ◽

Quantum Mechanical Effects

AbstractReactive-magnetron-sputtered ZrO2 thin film has been deposited on Si directly for gate dielectric application. Both structural and electrical properties of the ZrO2 film have been investigated. An amorphous structure for 30Å ZrO2 and a semi-amorphous structure for 200Å ZrO2 have been revealed. The sputtered film shows a good stoichiometry and a good structural stability of ZrO2 based on the X-ray photoelectron spectroscopy and Rutherford backscattering spectroscopy data. Thin equivalent oxide thickness of about 11.5Å was obtained without the consideration of quantum mechanical effects. A low leakage of less than 10−2 A/cm2 at ±1V relative to the flat band voltage was obtained for this 11.5Å equivalent oxide thickness Pt/ZrO2/Si structure. High effective dielectric breakdown and superior reliability properties have been demonstrated for ZrO2 gate dielectric.

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Methods to Improve Properties of Gate Dielectrics in Metal-Oxide-Semiconductor

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.463-464.1341 ◽

2012 ◽

Vol 463-464 ◽

pp. 1341-1345 ◽

Cited By ~ 3

Author(s):

Chong Liu ◽

Xiao Li Fan

Keyword(s):

Gate Dielectric ◽

Gate Dielectrics ◽

Dielectric Materials ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Physical Limitation ◽

Low Leakage ◽

Mos Devices ◽

Low Leakage Current ◽

High K

This essay aims to introduce development of gate dielectrics. In present-day society, Si-based MOS has met its physical limitation. Scientists are trying to find a better material to reduce the thickness and dimension of MOS devices. While substrate materials are required to have a higher mobility, gate dielectrics are expected to have high k, low Dit and low leakage current. I conclude dielectrics in both Si-based and Ge-based MOS devices and several measures to improve the properties of these gate dielectric materials. I also introduce studies on process in our group and some achievements we have got. Significantly, this essay points out the special interest in rare-earth oxides functioning as gate dielectrics in recent years and summarizes the advantages and problems should be resolved in future.

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