scholarly journals High-Uniformity and High Drain Current Density Enhancement-Mode AlGaN/GaN Gates-Seperating Groove HFET

2018 ◽  
Vol 6 ◽  
pp. 106-109 ◽  
Author(s):  
Yuangang Wang ◽  
Hongyu Guo ◽  
Yulong Fang ◽  
Zhihong Feng ◽  
Shujun Cai ◽  
...  
2010 ◽  
Vol 31 (12) ◽  
pp. 1383-1385 ◽  
Author(s):  
Ronghua Wang ◽  
Paul Saunier ◽  
Xiu Xing ◽  
Chuanxin Lian ◽  
Xiang Gao ◽  
...  

2021 ◽  
Author(s):  
Pharyanshu Kachhawa ◽  
Nidhi Chaturvedi

Abstract This paper reports on TCAD-simulation of beta-gallium oxide ( β - Ga 2 O 3 ) MOSFET with the channel recessed into a 1 µ m thick Si-doped (1 × 10 18 cm - 3) epitaxial layer. We optimized gate recess thickness to achieve both, depletion and enhancement mode operation. The simulated β - Ga2O3 MOSFET structures show optimum depletion-mode and enhancement-mode characteristics for 150 nm and 15 nm active channel thickness, respectively. A comparative study is also done to analyze the thermal and electrical effects by simulating hetero-epitaxial β - Ga 2O3 layer on sapphire substrate and homoepitaxial β - Ga2O3 layer on β - Ga 2 O 3 substrate. MOSFET devices based on β - Ga 2 O 3 layers on sapphire substrates show improved performance compared to devices based on β - Ga2O3 layers on β - Ga 2 O 3 substrates in terms of drain current, trans-conductance and breakdown voltage. β - Ga 2 O 3 epitaxial layers on sapphire substrates exhibit a drain current density of 77.7 mA/mm with a peak trans-conductance of 2.28 mS/mm for D-mode operation and 27.3 mA/mm drain current density with a peak trans-conductance of 3.92 mS/mm for E-mode operation. In contrast, MOSFET devices based on β - Ga 2 O 3 epitaxial layers on β - Ga 2 O 3 substrates show a drain current density of 64.1 mA/mm for D-mode operation and 22.2 mA/mm drain current density with 3.2 mS/mm peak trans-conductance for E-mode operation. MOSFET devices based on β - Ga 2 O 3 epitaxial structures on sapphire and on β - Ga 2 O 3 substrates show reliable switching properties with sub-threshold swing of 95.98 mV/dec and 87.05 mV/dec respectively as well as a high I on =I off ratio of 10 11 . These simulation results show potential of laterally scaled β - Ga 2 O 3 MOSFETs for power switching applications.


2021 ◽  
Vol 14 (1) ◽  
pp. 014003
Author(s):  
Shahab Mollah ◽  
Kamal Hussain ◽  
Abdullah Mamun ◽  
Mikhail Gaevski ◽  
Grigory Simin ◽  
...  

2011 ◽  
Vol 130-134 ◽  
pp. 3392-3395 ◽  
Author(s):  
Gang Chen ◽  
Peng Wu ◽  
Song Bai ◽  
Zhe Yang Li ◽  
Yun Li ◽  
...  

. Silicon carbide (SiC) SITs were fabricated using home-grown epi structures. The gate is a recessed gate - bottom contact (RG - B). We designed that the mesa space 2.7μm and the gate channel is 1.2μm. One cell has 400 source fingers and each source finger width is 100μm. 1mm SiC SIT yielded a current density of 123mA/mm of drain current at a drain voltage of 20V. A maximum current density of 150 mA/mm was achieved with Vd=40V. The device blocking voltage with a gate bias of-16 V was 200 V. Packaged 24-cm devices were evaluated using amplifier circuits designed for class AB operations. A total power output in excess of 213 W was obtained with a power density of 8.5 W/cm and gain of 8.5 dB at 500 MHz under pulse operation.


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