Breakdown Voltage Instability Mechanism on the Field Limiting Rings Edge Termination of Buried Layer Rectifier

2021 ◽  
pp. 1-1
Author(s):  
Qiang Yuan ◽  
Zehong Li ◽  
Yishang Zhao ◽  
Tongyang Wang ◽  
Jiali Wan ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
Instability Mechanism ◽  
Edge Termination ◽  
Voltage Instability ◽  
Buried Layer

A Study of Oxide Etch Angle of Edge Termination Field Plate for Fabrication of SiC SBD

2017 ◽  
Vol 730 ◽  
pp. 102-105
Author(s):  
Ey Goo Kang
Keyword(s):  
Thermal Conductivity ◽  
Silicon Carbide ◽  
Breakdown Voltage ◽  
Dielectric Breakdown ◽  
Power Semiconductor ◽  
Field Plate ◽  
Edge Termination ◽  
Power Semiconductor Devices ◽  
Silicon Materials ◽  
Generation Power

The silicon carbide (SiC) material is being spotlighted as a next-generation power semiconductor material due to the characteristic limitations of the existing silicon materials. SiC has a wider band gap, higher breakdown voltage, higher thermal conductivity, and higher saturation electron mobility than Si. However, actual SiC SBDs exhibit a lower dielectric breakdown voltage than the theoretical breakdown voltage that causes the electric field concentration, a phenomenon that occurs on the edge of the contact surface as in the conventional power semiconductor devices. In this paper, we designed an edge termination structure using a field plate structure through oxide etch angle control, and optimized the structure to obtain a high breakdown voltage. The experiment results indicated that oxide etch angle was 45° when the breakdown voltage characteristics of the SiC SBD were optimized and a breakdown voltage of 681V was obtained.

Blocking Characteristics of 2.2 kV and 3.3 kV-Class 4H-SiC MOSFETs with Improved Doping Control for Edge Termination

2014 ◽  
Vol 778-780 ◽  
pp. 915-918 ◽  
Author(s):  
Keiji Wada ◽  
Kosuke Uchida ◽  
Ren Kimura ◽  
Mitsuhiko Sakai ◽  
Satoshi Hatsukawa ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
Epitaxial Layer ◽  
Doping Concentration ◽  
Doping Control ◽  
Parallel Plane ◽  
Drain Voltage ◽  
Edge Termination ◽  
Switching Characteristics

Blocking characteristics of 2.2 kV and 3.3 kV -class 4H-SiC MOSFETs with various doping conditions for the edge termination region have been investigated. By optimizing the implanted dose into the edge termination structure consisting of junction termination extension (JTE) and field limiting ring (FLR), a breakdown voltage of 3,850 V for 3.3 kV -class MOSFET has been attained. This result corresponds to about 95% of the approximate parallel-plane breakdown voltage estimated from the doping concentration and the thickness of the epitaxial layer. Implanted doping for the JFET region is effective in reducing JFET resistance, resulting in the specific on-resistance of 14.2 mΩcm2 for 3.3 kV SiC MOSFETs. Switching characteristics at the high drain voltage of 2.0 kV are also discussed.

scholarly journals A breakdown voltage model for implanted resurf p-LDMOS device on n+ buried layer

1994 ◽  
Vol 37 (7) ◽  
pp. 1383-1385 ◽  
Author(s):  
Ming-Jiang Zhou ◽  
A. Van Calster
Keyword(s):  
Breakdown Voltage ◽  
Buried Layer

High Voltage Silicon Carbide Devices

1998 ◽  
Vol 512 ◽  
Author(s):  
B. Jayant Baliga
Keyword(s):  
Silicon Carbide ◽  
Breakdown Voltage ◽  
High Voltage ◽  
Impact Ionization ◽  
Voltage Drop ◽  
Schottky Diodes ◽  
Inversion Layer ◽  
Drift Region ◽  
Edge Termination ◽  
Silicon Devices

ABSTRACTProgress made in the development of high performance power rectifiers and switches from silicon carbide are reviewed with emphasis on approaching the 100-fold reduction in the specific on-resistance of the drift region when compared with silicon devices with the same breakdown voltage. The highlights are: (a) Recently completed measurements of impact ionization coefficients in SiC indicate an even higher Baliga's figure of merit than projected earlier. (b) The commonly reported negative temperature co-efficient for breakdown voltage in SiC devices has been shown to arise at defects, allaying concerns that this may be intrinsic to the material. (c) Based upon fundamental considerations, it has been found that Schottky rectifiers offer superior on-state voltage drop than P-i-N rectifiers for reverse blocking voltages below 3000 volts. (d) Nearly ideal breakdown voltage has been experimentally obtained for Schottky diodes using an argon implanted edge termination. (e) Planar ion-implanted junctions have been successfully fabricated using oxide as a mask with high breakdown voltage and low leakage currents by using a filed plate edge termination. (f) High inversion layer mobility has been experimentally demonstrated on both 6H and 4H-SiC by using a deposited oxide layer as gate dielectric. (g) A novel, high-voltage, normally-off, accumulation-channel, MOSFET has been proposed and demonstrated with 50x lower specific on-resistance than silicon devices in spite of using logic-level gate drive voltages. These results indicate that SiC based power devices could become commercially viable in the 21st century if cost barriers can be overcome.

An Improvement of the Breakdown Voltage Characteristics of NPT-TIGBT by Using a P-Buried Layer

2013 ◽  
Vol 717 ◽  
pp. 158-163
Author(s):  
Phasapon Manosukritkul ◽  
Amonrat Kerdpardist ◽  
Montree Saenlamool ◽  
Ekalak Chaowicharat ◽  
Amporn Poyai ◽  
...  
Keyword(s):  
Electric Field ◽  
Carrier Concentration ◽  
Breakdown Voltage ◽  
Bipolar Transistor ◽  
Insulated Gate Bipolar Transistor ◽  
Buried Layer ◽  
Simulation Results ◽  
Drift Layer

In this paper, we introduced a P-buried (Pb) layer under trench gate which relieved the electric field crowding in the Non Punch Through Trench gate Insulated Gate Bipolar Transistor (NPT-TIGBT) structure. The Pblayer, with carrier concentration of 5x1016cm-3, was created underneath the trench gate within the n-drift layer. In this way, the concentration of electric field at the trench bottom corner decreased. As a result, the breakdown voltage characteristics of NPT-TIGBT improved. The structures were proposed and verified by T-CAD Sentuarus simulation. From the simulation results, the breakdown voltage increased by approximately 30% compared with conventional NPT-TIGBT.

Numerical Simulation and Optimization for 900V 4H-SiC DiMOSFET Fabrication

2005 ◽  
Vol 483-485 ◽  
pp. 793-796 ◽  
Author(s):  
Sang Cheol Kim ◽  
Wook Bahng ◽  
Nam Kyun Kim ◽  
Eun Dong Kim ◽  
T. Ayalew ◽  
...  
Keyword(s):  
Numerical Simulation ◽  
Breakdown Voltage ◽  
Room Temperature ◽  
General Purpose ◽  
Half Cell ◽  
Trade Off ◽  
Simulation And Optimization ◽  
Edge Termination ◽  
Well Spacing ◽  
Simulation Results

We report the simulation results of 25µm half cell pitch vertical type 4H-SiC DiMOSFET using the general-purpose device simulator MINIMOS-NT. The best trade-off between breakdown voltage and on-resistance in terms of BFOM is around 19MW/cm2 with a p-well spacing 5µm. The specific on -resistance, RON, sp, simulated with VGS=10V and VDS=1V at room temperature, is around 22.76mWcm2. An 900V breakdown voltage is simulated with ion-implanted edge termination.

4.5kV SiC JBS Diodes

2013 ◽  
Vol 347-350 ◽  
pp. 1506-1509 ◽  
Author(s):  
Yong Hong Tao ◽  
Run Hua Huang ◽  
Gang Chen ◽  
Song Bai ◽  
Yun Li
Keyword(s):  
Numerical Simulations ◽  
Breakdown Voltage ◽  
High Voltage ◽  
Current Density ◽  
Doping Level ◽  
Doping Concentration ◽  
Device Structure ◽  
Reverse Voltage ◽  
Edge Termination ◽  
Drift Layer

High voltage 4H-SiC junction barrier schottky (JBS) diode with breakdown voltage higher than 4.5 kV has been fabricated. The doping level and thickness of the N-type drift layer and the device structure have been performed by numerical simulations. The thickness of the device epilayer is 50 μm, and the doping concentration is 1.2×1015 cm3. A floating guard rings edge termination has been used to improve the effectiveness of the edge termination technique. The diodes can block a reverse voltage of at least 4.5 kV, and the on-state current density was 80 A/cm2 at VF =4 V.

Single Photolithography/Implantation 120-Zone Junction Termination Extension for High-Voltage SiC Devices

2012 ◽  
Vol 717-720 ◽  
pp. 977-980 ◽  
Author(s):  
Megan Snook ◽  
Ty McNutt ◽  
Chris Kirby ◽  
Harold Hearne ◽  
Victor Veliadis ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
High Voltage ◽  
Cycle Time ◽  
Pin Diodes ◽  
Edge Termination ◽  
Comparable Performance ◽  
Process Complexity ◽  
Single Implant ◽  
The Ideal

The multi-zone junction termination extension (MJTE) is a widely used edge termination technique for achieving high voltage SiC devices. It is commonly implemented with multiple lithography and implantation events. In order to reduce process complexity, cycle time, and cost, a single photolithography and single implant MJTE technique has been successfully developed. The method utilizes a pattern of finely graduated oxide windows that filter the implant dose and create a graded MJTE in a single implant and single photolithography step. Based on this technique, 6 kV / 0.09 cm2 PiN diodes were fabricated utilizing a 120-zone single-implant JTE design. This novel single-implant MJTE design captures 93% of the ideal breakdown voltage and has comparable performance and yield to a baseline three implant process.

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