scholarly journals Low-Voltage Gate-Leakage-Based Timer Using an Amplifier-Less Replica-Bias Switching Technique in 55-nm DDC CMOS

2020 ◽  
Vol 1 ◽  
pp. 107-114
Author(s):  
Atsuki Kobayashi ◽  
Kiichi Niitsu
2018 ◽  
Vol 9 (1) ◽  
pp. 2 ◽  
Author(s):  
Sooji Nam ◽  
Yong Jeong ◽  
Joo Kim ◽  
Hansol Yang ◽  
Jaeyoung Jang

Here, we report on the use of a graphene oxide (GO)/polystyrene (PS) bilayer as a gate dielectric for low-voltage organic field-effect transistors (OFETs). The hydrophilic functional groups of GO cause surface trapping and high gate leakage, which can be overcome by introducing a layer of PS—a hydrophobic polymer—onto the top surface of GO. The GO/PS gate dielectric shows reduced surface roughness and gate leakage while maintaining a high capacitance of 37.8 nF cm−2. The resulting OFETs show high-performance operation with a high mobility of 1.05 cm2 V−1 s−1 within a low operating voltage of −5 V.


Author(s):  
Marek Malecki ◽  
J. Victor Small ◽  
James Pawley

The relative roles of adhesion and locomotion in malignancy have yet to be clearly established. In a tumor, subpopulations of cells may be recognized according to their capacity to invade neighbouring tissue,or to enter the blood stream and metastasize. The mechanisms of adhesion and locomotion are themselves tightly linked to the cytoskeletal apparatus and cell surface topology, including expression of integrin receptors. In our studies on melanomas with Fluorescent Microscopy (FM) and Cell Sorter(FACS), we noticed that cells in cultures derived from metastases had more numerous actin bundles, then cells from primary foci. Following this track, we attempted to develop technology allowing to compare ultrastructure of these cells using correlative Transmission Electron Microscopy(TEM) and Low Voltage Scanning Electron Microscopy(LVSEM).


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