CMOS-based VLSI design of a specific integrated circuit (ASIC) sensor interface IC chip (non-reviewed)

2008 ◽  
Author(s):  
K. Williams ◽  
H. Penn ◽  
T. Tarver ◽  
A. Odeh ◽  
Z. Xiao
Keyword(s):  
Integrated Circuit ◽  
Vlsi Design ◽  
Sensor Interface ◽  
Circuit Asic

scholarly journals Pair Wise Swapping Based Hypergraph Partitioning Algorithms for VLSI Design

2019 ◽  
Vol 8 (2) ◽  
pp. 5589-5593
Keyword(s):  
Integrated Circuit ◽  
Digital Camera ◽  
Vlsi Design ◽  
Electronic Systems ◽  
Circuit Partitioning ◽  
Computing Device ◽  
Hypergraph Partitioning ◽  
Vlsi Physical Design ◽  
Portable Computing ◽  
Partitioning Algorithms

A VLSI integrated circuit is the most significant part of electronic systems such as personal computer or workstation, digital camera, cell phone or a portable computing device, and automobile. So development within the field of electronic space depends on the design planning of VLSI integrated circuit. Circuit partitioning is most important step in VLSI physical design process. Many heuristic partitioning algorithms are proposed for this problem. The first heuristic algorithm for hypergraph partitioning in the domain of VLSI is FM algorithm. In this paper, I have proposed three variations of FM algorithm by utilizing pair insightful swapping strategies. I have played out a relative investigation of FM and my proposed algorithms utilizing two datasets for example ISPD98 and ISPD99. Test results demonstrate that my proposed calculations outflank the FM algorithm.

scholarly journals Design of ASIC Square Calculator Using AncientVedic Mathematics

2018 ◽  
Vol 7 (2.23) ◽  
pp. 464
Author(s):  
Angshuman Khan ◽  
Sudip Halder ◽  
Shubhajit Pal
Keyword(s):  
Integrated Circuit ◽  
Software Tool ◽  
Logic Gates ◽  
Digital Logic ◽  
Simple Design ◽  
Innovative Design ◽  
Circuit Asic ◽  
Vedic Mathematics ◽  
Application Specific Integrated Circuit ◽  
Application Specific

This article includes a simple design of Vedic square calculator for Application Specific Integrated Circuit (ASIC). This is a straightforward and innovative design of Vedic calculator using only few basic digital logic gates. Among the all sutras and sub sutras of ancient Vedic mathematics, the sutra ‘Urdhva Tiryagbyham’ is used here for square calculation of two bits numbers which results in an effortless and faster method of square calculation than all the existing methods. The design and minimization of the circuit has been carried out to achieve a standard architecture that is the simplest too. Here Xilinx ISE software tool is used rigorously to simulate the architecture.  

scholarly journals A enhanced algorithm for floorplan design using evolutionary technique

2012 ◽  
Vol 1 (2) ◽  
pp. 38
Author(s):  
Dhiraj Dhiraj ◽  
Seema Verma ◽  
Rajesh Kumar ◽  
Himanshu Choudhary
Keyword(s):  
Integrated Circuit ◽  
Design Automation ◽  
Large Scale ◽  
Vlsi Design ◽  
Optimal Placement ◽  
Iterative Approach ◽  
Modified Genetic Algorithm ◽  
Evolutionary Technique ◽  
Floor Planning

Floor planning is an important problem in very large scale integrated-circuit (VLSI) design automation domain as it evaluates the performance, size, yield and reliability of ICs. Due to rapid increase in number of components on a chip, floor planning has gained its importance further in determining the quality of the design achieved. In this paper we have devised an approach for placement of modules in a given area with bounding constraints in terms of minimum placement area imposed. We have used Modified Genetic Algorithm (MGA) technique for determining and obtaining an optimal placement using an iterative approach.

scholarly journals ASIC-Resistant Proof of Work Based on Power Analysis of Low-End Microcontrollers

Mathematics ◽  
2020 ◽  
Vol 8 (8) ◽  
pp. 1343
Author(s):  
Hyunjun Kim ◽  
Kyungho Kim ◽  
Hyeokdong Kwon ◽  
Hwajeong Seo
Keyword(s):  
Integrated Circuit ◽  
Hash Function ◽  
Power Analysis ◽  
Post Processing ◽  
Circuit Asic ◽  
Final Output ◽  
Application Specific Integrated Circuit ◽  
Application Specific ◽  
Measured Power

Application-Specific Integrated Circuit (ASIC)-resistant Proof-of-Work (PoW) is widely adopted in modern cryptocurrency. The operation of ASIC-resistant PoW on ASIC is designed to be inefficient due to its special features. In this paper, we firstly introduce a novel ASIC-resistant PoW for low-end microcontrollers. We utilized the measured power trace during the cryptographic function on certain input values. Afterward, the post-processing routine was performed on the power trace to remove the noise. The refined power trace is always constant information depending on input values. By performing the hash function with the power trace, the final output was obtained. This framework only works on microcontrollers and the power trace depends on certain input values, which is not predictable and computed by ASIC.

A capacitive liquid level sensor interface application specitic integrated circuit for new carrier rocket

2018 ◽  
Vol 26 (4) ◽  
pp. 875-883
Author(s):  
陈威 CHEN Wei ◽  
黄诚 HUANG Cheng ◽  
秦尧 QIN Yao ◽  
张国瑞 ZHANG Guo-rui ◽  
尹亮 YIN Liang
Keyword(s):  
Integrated Circuit ◽  
Liquid Level ◽  
Sensor Interface ◽  
Level Sensor ◽  
Liquid Level Sensor ◽  
Carrier Rocket

VLSI Design at the Undergraduate Level

1987 ◽  
Vol 24 (4) ◽  
pp. 309-318 ◽  
Author(s):  
J. G. Swanson
Keyword(s):  
Integrated Circuit ◽  
Vlsi Design ◽  
Undergraduate Level ◽  
Cmos Integrated Circuit ◽  
Electronic Engineering ◽  
Academic Year

This paper describes the experience gained in teaching a VLSI design course to students in the final year of a three-year course in Electronic Engineering. Each of the twenty students designed and tested their own full-custom CMOS integrated circuit within one academic year.

The Study of a Fluxgate SPICE Model Based on Schmitt Trigger

2011 ◽  
Vol 483 ◽  
pp. 212-218
Author(s):  
Yue Zhao ◽  
Jing Lin Hu ◽  
Wen Zhong Lou ◽  
Long Fei Zhang
Keyword(s):  
Integrated Circuit ◽  
Schmitt Trigger ◽  
Magnetic Core ◽  
Soft Magnetic ◽  
Sensor Interface ◽  
Simulation Accuracy ◽  
Spice Model ◽  
Fluxgate Sensor ◽  
Core Characteristics ◽  
Sensor Probe

Current fluxgate sensor probe SPICE models constructed by using arc tangent transfer function method and the diode model in fluxgate sensor simulation had some disadvantages which were non convergence, low simulation accuracy, discontinuously adjusted core characteristics and the model couldn’t simulate the hysteresis characteristic. IO characteristics of Schmitt Trigger was similar to the B-H curve of soft magnetic core in shape, for this reason Schmitt trigger was used to construct fluxgate probe SPICE model. HSPICE was used in simulation. Simulation results shown that this model can simulate the real electrical properties of fluxgate probe accurately. This model can be used for fluxgate sensor interface integrated circuit research and fluxgate sensor application, and provide a reference to judge the performance for fluxgate sensors of which core parameters within a certain range.

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