Back gate engineering for suppression of threshold voltage fluctuation in fully-depleted SOI MOSFETs

2002 ◽  
Author(s):  
T. Numata ◽  
M. Noguchi ◽  
Y. Oowaki ◽  
S. Takagi
Keyword(s):  
Threshold Voltage ◽  
Voltage Fluctuation ◽  
Back Gate ◽  
Fully Depleted ◽  
Gate Engineering

Reduction in threshold voltage fluctuation in fully-depleted SOI MOSFETs with back gate control

2004 ◽  
Vol 48 (6) ◽  
pp. 979-984 ◽  
Author(s):  
Toshinori Numata ◽  
Mitsuhiro Noguchi ◽  
Shin-ichi Takagi
Keyword(s):  
Threshold Voltage ◽  
Voltage Fluctuation ◽  
Back Gate ◽  
Fully Depleted ◽  
Gate Control

LDD and Back-Gate Engineering for Fully Depleted Planar SOI Transistors with Thin Buried Oxide

2010 ◽  
Vol 57 (6) ◽  
pp. 1319-1326 ◽  
Author(s):  
Ran Yan ◽  
Russell Duane ◽  
Pedram Razavi ◽  
Aryan Afzalian ◽  
Isabelle Ferain ◽  
...  
Keyword(s):  
Back Gate ◽  
Fully Depleted ◽  
Buried Oxide ◽  
Gate Engineering

Back gate effects on threshold voltage sensitivity to SOI thickness in fully-depleted SOI MOSFETs

2001 ◽  
Vol 22 (1) ◽  
pp. 32-34 ◽  
Author(s):  
M. Noguchi ◽  
T. Numata ◽  
Y. Mitani ◽  
T. Shino ◽  
S. Kawanaka ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Voltage Sensitivity ◽  
Back Gate ◽  
Fully Depleted
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