scholarly journals Electrical and Physical Analysis of Thermal Degradations of AlGaN/GaN HEMT Under Radar-Type Operating Life

Author(s):  
Farid Temcamani ◽  
Jean-Baptiste Fonder ◽  
Olivier Latry ◽  
Cedric Duperrier
Author(s):  
Lény Baczkowski ◽  
Franck Vouzelaud ◽  
Dominique Carisetti ◽  
Nicolas Sarazin ◽  
Jean-Claude Clément ◽  
...  

Abstract This paper shows a specific approach based on infrared (IR) thermography to face the challenging aspects of thermal measurement, mapping, and failure analysis on AlGaN/GaN high electron-mobility transistors (HEMTs) and MMICs. In the first part of this paper, IR thermography is used for the temperature measurement. Results are compared with 3D thermal simulations (ANSYS) to validate the thermal model of an 8x125pm AIGaN/GaN HEMT on SiC substrate. Measurements at different baseplate temperature are also performed to highlight the non-linearity of the thermal properties of materials. Then, correlations between the junction temperature and the life time are also discussed. In the second part, IR thermography is used for hot spot detection. The interest of the system for defect localization on AIGaN/GaN HEMT technology is presented through two case studies: a high temperature operating life test and a temperature humidity bias test.


2019 ◽  
Vol 100-101 ◽  
pp. 113434 ◽  
Author(s):  
N. Moultif ◽  
O. Latry ◽  
M. Ndiaye ◽  
T. Neveu ◽  
E. Joubert ◽  
...  
Keyword(s):  
Gan Hemt ◽  

2012 ◽  
Vol 52 (9-10) ◽  
pp. 2205-2209 ◽  
Author(s):  
J.-B. Fonder ◽  
L. Chevalier ◽  
C. Genevois ◽  
O. Latry ◽  
C. Duperrier ◽  
...  

2012 ◽  
Vol 52 (11) ◽  
pp. 2561-2567 ◽  
Author(s):  
J.-B. Fonder ◽  
O. Latry ◽  
C. Duperrier ◽  
M. Stanislawiak ◽  
H. Maanane ◽  
...  
Keyword(s):  
Class Ab ◽  
Gan Hemt ◽  
Class B ◽  

2017 ◽  
Vol 76-77 ◽  
pp. 338-343 ◽  
Author(s):  
A. Graff ◽  
M. Simon-Najasek ◽  
F. Altmann ◽  
J. Kuzmik ◽  
D. Gregušová ◽  
...  

2011 ◽  
Vol E94-C (7) ◽  
pp. 1193-1198 ◽  
Author(s):  
Akihiro ANDO ◽  
Yoichiro TAKAYAMA ◽  
Tsuyoshi YOSHIDA ◽  
Ryo ISHIKAWA ◽  
Kazuhiko HONJO

Author(s):  
Po Fu Chou ◽  
Li Ming Lu

Abstract Dopant profile inspection is one of the focused ion beam (FIB) physical analysis applications. This paper presents a technique for characterizing P-V dopant regions in silicon by using a FIB methodology. This technique builds on published work for backside FIB navigation, in which n-well contrast is observed. The paper demonstrates that the technique can distinguish both n- and p-type dopant regions. The capability for imaging real sample dopant regions on current fabricated devices is also demonstrated. SEM DC and FIB DC are complementary methodologies for the inspection of dopants. The advantage of the SEM DC method is high resolution and the advantage of FIB DC methodology is high contrast, especially evident in a deep N-well region.


Author(s):  
Tsung-Te Li ◽  
Chao-Chi Wu ◽  
Jung-Hsiang Chuang ◽  
Jon C. Lee

Abstract This article describes the electrical and physical analysis of gate leakage in nanometer transistors using conducting atomic force microscopy (C-AFM), nano-probing, transmission electron microscopy (TEM), and chemical decoration on simulated overstressed devices. A failure analysis case study involving a soft single bit failure is detailed. Following the nano-probing analysis, TEM cross sectioning of this failing device was performed. A voltage bias was applied to exaggerate the gate leakage site. Following this deliberate voltage overstress, a solution of boiling 10%wt KOH was used to etch decorate the gate leakage site followed by SEM inspection. Different transistor leakage behaviors can be identified with nano-probing measurements and then compared with simulation data for increased confidence in the failure analysis result. Nano-probing can be used to apply voltage stress on a transistor or a leakage path to worsen the weak point and then observe the leakage site easier.


Author(s):  
Chunyu Zhang ◽  
Lakshmi Vedula ◽  
Shekhar Khandekar

Abstract Latch-up induced during High Temperature Operating Life (HTOL) test of a mixed signal device fabricated with 1.0 μm CMOS, double poly, double metal process caused failures due to an open in aluminum metal line. Metal lines revealed wedge voids of about 50% of the line width. Triggering of latch up mechanism during the HTOL test resulted in a several fold increase of current flowing through the ground metal line. This increase in current resulted in the growth of the wedge voids leading to failures due to open metal lines.


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