Novel /spl mu/trench phase-change memory cell for embedded and stand-alone non-volatile memory applications

2004 ◽  
Author(s):  
F. Pellizzer ◽  
A. Pirovano ◽  
F. Ottogalli ◽  
M. Magistretti ◽  
M. Scaravaggi ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
Memory Applications ◽  
Change Memory

Systematic materials design for phase-change memory with small density changes for high-endurance non-volatile memory applications

2019 ◽  
Vol 12 (5) ◽  
pp. 051008 ◽  
Author(s):  
Yuta Saito ◽  
Shogo Hatayama ◽  
Yi Shuang ◽  
Satoshi Shindo ◽  
Paul Fons ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Materials Design ◽  
Non Volatile Memory ◽  
Small Density ◽  
Volatile Memory ◽  
Memory Applications ◽  
Change Memory

scholarly journals Design of Non-Volatile Phase Change Memory for FPGA Architectures

2019 ◽  
Vol 8 (2) ◽  
pp. 2253-2257
Keyword(s):  
Phase Change ◽  
Flash Memory ◽  
Phase Change Memory ◽  
Test Environment ◽  
Memory Circuit ◽  
Fpga Architecture ◽  
Memory Circuits ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
Change Memory

Phase change memory circuit has been designed to function as Non-Volatile memory circuit using 45nm and 90nm technology. The other non-volatile memory circuits like Flash and MTJ-MRAM are realized in 45nm and 90nm CMOS Technology in which their output behavioral characteristics, power and delay parameters are obtained in order to compare with performance of MTJ-MRAM and Flash memory circuits. The design has been carried out using Cadence Virtuoso – Electronic Design Automation (EDA) Software tool in Analog Design Environment (ADE), the advanced design and simulation is performed in virtuoso platform. The schematic for PCM is designed and simulations are carried out in 45nm and 90nm technology using a test environment. Further the work has been extended to design memory circuit that gives non-volatility which can be implemented for FPGA architecture. Existing FPGA architectures which are non-volatile based, have limitations and demands for a better computing memory to be integrated within. The present work brings out a novel Phase Change Memory design with better performance than existing flash based and anti-fuse based types of FPGAs and also better than MTJ-MRAM attributes. The present work compares attributes like power dissipation and delay of PCM with other non volatile memories used for FPGA architecture. Further PCM techniques indicate significant power and delay reduction when compared to MTJ-MRAM and flash memory circuit.

A SPICE model for a phase-change memory cell based on the analytical conductivity model

2012 ◽  
Vol 33 (11) ◽  
pp. 114004
Author(s):  
Yiqun Wei ◽  
Xinnan Lin ◽  
Yuchao Jia ◽  
Xiaole Cui ◽  
Jin He ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Memory Cell ◽  
Conductivity Model ◽  
Spice Model ◽  
Change Memory

scholarly journals Scalability of Phase Change Materials in Nanostructure Template

2015 ◽  
Vol 2015 ◽  
pp. 1-4
Author(s):  
Wei Zhang ◽  
Biyun L. Jackson ◽  
Ke Sun ◽  
Jae Young Lee ◽  
Shyh-Jer Huang ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Materials ◽  
Scaling Limit ◽  
Phase Change Memory ◽  
Leakage Power ◽  
Memory Element ◽  
Transmission Electron ◽  
Diffraction Mode ◽  
Memory Applications ◽  
Change Memory

The scalability of In2Se3, one of the phase change materials, is investigated. By depositing the material onto a nanopatterned substrate, individual In2Se3nanoclusters are confined in the nanosize pits with well-defined shape and dimension permitting the systematic study of the ultimate scaling limit of its use as a phase change memory element. In2Se3of progressively smaller volume is heated inside a transmission electron microscope operating in diffraction mode. The volume at which the amorphous-crystalline transition can no longer be observed is taken as the ultimate scaling limit, which is approximately 5 nm3for In2Se3. The physics for the existence of scaling limit is discussed. Using phase change memory elements in memory hierarchy is believed to reduce its energy consumption because they consume zero leakage power in memory cells. Therefore, the phase change memory applications are of great importance in terms of energy saving.

Simulation and Design of a Silicon Nanowire based Phase Change Memory Cell

2012 ◽  
Vol 1431 ◽  
Author(s):  
Ramin Banan Sadeghian ◽  
Yusuf Leblebici ◽  
Ali Shakouri
Keyword(s):  
Phase Change ◽  
High Speed ◽  
Low Cost ◽  
Silicon Nanowire ◽  
Phase Change Memory ◽  
Random Access ◽  
Memory Cell ◽  
Oxide Thickness ◽  
Nanowire Diameter ◽  
Change Memory

ABSTRACTIn this work we present preliminary calculations and simulations to demonstrate feasibility of programming a nanoscale Phase Change Random Access Memory (PCRAM) cell by means of a silicon nanowire ballistic transistor (SNWBT). Memory cells based on ballistic transistors bear the advantage of having a small size and high-speed operation with low power requirements. A one-dimensional MOSFET model (FETToy) was used to estimate the output current of the nanowire as a function of its diameter. The gate oxide thickness was 1.5 nm, and the Fermi level at source was set to -0.32 eV. For the case of VDS = VGS = 1 V, when the nanowire diameter was increased from 1 to 60 nm, the output power density dropped from 109 to 106 W cm-2 , while the current increased from 20 to 90 μA. Finite element electro-thermal analysis were carried out on a segmented cylindrical phase-change memory cell made of Ge2Sb2Te5 (GST) chalcogenide, connected in series to the SNWBT. The diameter of the combined device, d, and the aspect ratio of the GST region were selected so as to achieve optimum heating of the GST. With the assumption that the bulk thermal conductivity of GST does not change significantly at the nanoscale, it was shown that for d = 24 nm, a ‘reset’ programming current of ID = 80 μA can heat the GST up to its melting point. The results presented herein can help in the design of low cost, high speed, and radiation tolerant nanoscale PCRAM devices.

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