Comparing LQG/LTR and the SDRE Techniques for Hybrid Fully-Connected PLL Network Control

2013 ◽  
Author(s):  
Átila Madureira Bueno ◽  
Angelo Marcelo Tusset ◽  
Diego Paolo Ferruzzo Correa ◽  
José Roberto Castilho Piqueira ◽  
José Manoel Balthazar
Keyword(s):  
Integrated Circuits ◽  
Network Control ◽  
Clock Signal ◽  
Clock Distribution ◽  
Signal Distribution ◽  
Performance Requirements ◽  
Distribution Process ◽  
And Performance ◽  
The Stability ◽  
Fully Connected

Synchronization plays an important role in telecommunication systems and integrated circuits. The Master-Slave is a commonly used strategy for clock signal distribution. However, due to the wireless networks development and the higher operation frequency of integrated circuits, the Mutually-Connected clock distribution strategies are becoming important, and the Fully-Connected strategy appears as a convenient engineering solution. The main drawback of the Fully-Connected architecture is the definition of control algorithms that assure the stability of the network sinchronization. In hybrid synchronization techniques groups of nodes synchronized by the Fully-Connected architecture are synchronized with network master clocks by using the Master-Slave tecnique. In this arrangement, if a route of clock signal distribution becomes inoperative, the group of Fully-Connected nodes retain for some time the original phase and frequency received from the network. The Fully-Connected architecture complexity imposes difficulties to satisfy both stability and performance requirements in the control system design. For that reason the multi-variable LQG/LTR and the SDRE control techniques are applied in order to fulfill both stability and performance requirements. The performance of both techniques are compared, and the results seems to confirm the improvement in the transient response and in the precision of the clock distribution process.

scholarly journals Fully Connected PLL Networks: How Filter Determines the Number of Nodes

2009 ◽  
Vol 2009 ◽  
pp. 1-13 ◽  
Author(s):  
Átila Madureira Bueno ◽  
André Alves Ferreira ◽  
José Roberto C. Piqueira
Keyword(s):  
Integrated Circuits ◽  
Distribution Systems ◽  
Second Order ◽  
Phase Locked Loops ◽  
Clock Distribution ◽  
Synchronous State ◽  
First Order ◽  
Automation Systems ◽  
Low Pass ◽  
Fully Connected

Synchronization plays an important role in telecommunication systems, integrated circuits, and automation systems. Formerly, the masterslave synchronization strategy was used in the great majority of cases due to its reliability and simplicity. Recently, with the wireless networks development, and with the increase of the operation frequency of integrated circuits, the decentralized clock distribution strategies are gaining importance. Consequently, fully connected clock distribution systems with nodes composed of phase-locked loops (PLLs) appear as a convenient engineering solution. In this work, the stability of the synchronous state of these networks is studied in two relevant situations: when the node filters are first-order lag-lead low-pass or when the node filters are second-order low-pass. For first- order filters, the synchronous state of the network shows to be stable for any number of nodes. For second-order filter, there is a superior limit for the number of nodes, depending on the PLL parameters.

scholarly journals Event-Based Stabilization over Networks with Transmission Delays

2012 ◽  
Vol 2012 ◽  
pp. 1-8 ◽  
Author(s):  
Xiangyu Meng ◽  
Tongwen Chen
Keyword(s):  
Feedback Gain ◽  
Pendulum System ◽  
Transmission Delays ◽  
Performance Requirements ◽  
Inverted Pendulum System ◽  
Event Triggering ◽  
Continuous Feedback ◽  
And Performance ◽  
The Stability ◽  
Event Based

This paper investigates asymptotic stabilization for linear systems over networks based on event-driven communication. A new communication logic is proposed to reduce the feedback effort, which has some advantages over traditional ones with continuous feedback. Considering the effect of time-varying transmission delays, the criteria for the design of both the feedback gain and the event-triggering mechanism are derived to guarantee the stability and performance requirements. Finally, the proposed techniques are illustrated by an inverted pendulum system and a numerical example.

scholarly journals Architectural approach to cope with network-induced problems in network control systems design

2018 ◽  
Vol 69 (4) ◽  
pp. 270-278
Author(s):  
Ivan Popović ◽  
Aleksandar Rakić
Keyword(s):  
Process Control ◽  
Systems Design ◽  
Network Control ◽  
Data Transport ◽  
Architectural Styles ◽  
Wide Range ◽  
Automation And Control ◽  
And Performance ◽  
The Stability ◽  
And Control

Abstract In the field of process control engineering, network-based systems enable extensive, flexible and scalable applications in industrial automation and control. However, network-induced problems are influencing the stability and performance and they are introducing constraints in the system design and operation. While most of the existing design methodologies are searching for the specific solution within the domain of the control theory, we propose the comprehensive architectural approach that addresses wide range of the network-related issues and copes with them in the effective way. Presented solution combines several architectural styles encapsulating the actuating, sensing and control functionality into the unified service-oriented components, while the data transport is supported through event-triggered distributed middleware components. Given architectural approach decouples the design of process control functionality from the properties of the control network infrastructure. The effectiveness of the proposed solution is verified through the analysis of the system operation in the given case-study.

scholarly journals Robust Control for Helicopters Performance Improvement: an LMI Approach

2020 ◽  
Author(s):  
Luiz Ricardo Trajano da Silva ◽  
Victor Augusto Fernandes de Campos ◽  
Alain Segundo Potts
Keyword(s):  
Linear Matrix ◽  
Linear Quadratic ◽  
Performance Requirements ◽  
Multiple Input ◽  
Polytopic Systems ◽  
And Performance ◽  
The Stability ◽  
Linearized Model ◽  
Multivariate Systems ◽  
Lmi Region

This paper presents an LMI (Linear Matrix Inequalities) application for the design of robust controllers for multivariate systems that have multiple points of operation. Some systems change their parameters along time, then, it is necessary to switch the control for different operational points. The purpose of this controller is to ensure the stability and performance requirements of the system for different operating points with the same controller. The method uses the following concepts of predefined structures controller, LMI region, and polytopic systems. To validate the controller a linearized model of a helicopter was used. These helicopters belong to a system class of MIMO (Multiple-Input Multiple Outputs) type and present a complex dynamic in their flight modes, therefore, due to these features, this type of helicopter is a good model to implement and test the efficiency of the described method in this work. The results were satisfactory. Some limitations in its implementation were found and discussed. An LQG (Linear-Quadratic-Gaussian) controller was also designed for the same model of the helicopter just for comparison. Analyzing the settling time properties, the LMI controller presented a better response than the LQG controller.

Learning Parity with Physical Noise: Imperfections, Reductions and FPGA Prototype

2021 ◽  
pp. 390-417
Author(s):  
Davide Bellizia ◽  
Clément Hoffmann ◽  
Dina Kamel ◽  
Hanlin Liu ◽  
Pierrick Méaux ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Building Blocks ◽  
Learning Problems ◽  
Inner Product ◽  
Secret Key ◽  
Data Dependencies ◽  
Performance Requirements ◽  
And Performance ◽  
Lpn Problem ◽  
Error Probabilities

Hard learning problems are important building blocks for the design of various cryptographic functionalities such as authentication protocols and post-quantum public key encryption. The standard implementations of such schemes add some controlled errors to simple (e.g., inner product) computations involving a public challenge and a secret key. Hard physical learning problems formalize the potential gains that could be obtained by leveraging inexact computing to directly generate erroneous samples. While they have good potential for improving the performances and physical security of more conventional samplers when implemented in specialized integrated circuits, it remains unknown whether physical defaults that inevitably occur in their instantiation can lead to security losses, nor whether their implementation can be viable on standard platforms such as FPGAs. We contribute to these questions in the context of the Learning Parity with Physical Noise (LPPN) problem by: (1) exhibiting new (output) data dependencies of the error probabilities that LPPN samples may suffer from; (2) formally showing that LPPN instances with such dependencies are as hard as the standard LPN problem; (3) analyzing an FPGA prototype of LPPN processor that satisfies basic security and performance requirements.

scholarly journals A State of Art Survey for OS Performance Improvement

2018 ◽  
Vol 6 (3) ◽  
pp. 118-123 ◽  
Author(s):  
Lailan M. Haji ◽  
Subhi R.M. Zeebaree ◽  
Karwan Jacksi ◽  
Diyar Q. Zeebaree
Keyword(s):  
Performance Improvement ◽  
Critical Issue ◽  
The Past ◽  
Performance Requirements ◽  
And Performance ◽  
Measurement And Evaluation ◽  
The Stability ◽  
High Level ◽  
Multiple Metrics ◽  
Selection Of

Through the huge growth of heavy computing applications which require a high level of performance, it is observed that the interest of monitoring operating system performance has also demanded to be grown widely. In the past several years since OS performance has become a critical issue, many research studies have been produced to investigate and evaluate the stability status of OSs performance. This paper presents a survey of the most important and state of the art approaches and models to be used for performance measurement and evaluation. Furthermore, the research marks the capabilities of the performance-improvement of different operating systems using multiple metrics. The selection of metrics which will be used for monitoring the performance depends on monitoring goals and performance requirements. Many previous works related to this subject have been addressed, explained in details, and compared to highlight the top important features that will very beneficial to be depended for the best approach selection.

scholarly journals Master-Slave Topologies with Phase-Locked Loops

2020 ◽  
Vol 2020 ◽  
pp. 1-12
Author(s):  
José Roberto C. Piqueira
Keyword(s):  
Integrated Circuits ◽  
Communication Networks ◽  
Smart Grids ◽  
Essential Element ◽  
Recovery Process ◽  
Distribution Networks ◽  
Phase Locked Loops ◽  
Signal Recovery ◽  
Clock Signal ◽  
Clock Distribution

Since phase-locked loops (PLLs) were conceived by Bellescize in 1932, their presence has become almost mandatory in any telecommunication device or network, being the essential element to recover frequency and phase information. As the technology developed, PLL appeared in several applications, such as, dense communication networks, smart grids, electronic instrumentation, computational clusters, and integrated circuits. In all of these practical cases, isolated or networked PLLs are responsible for recovering the correct time basis and synchronizing the processes. According to the application needs, different clock distribution strategies were developed, with the master-slave being the simplest and most used choice. Considering that the master clock is obtained from a stable periodic oscillator, two topologies are studied: one-way, not considering clock feedback; and two-way master-slave, with the slave nodes providing clock feedback to the master. Here, these two cases are studied by using simulation strategies, presenting results about the clock signal recovery process in the presence of disturbances, indicating that master-slave clock distribution networks can be useful for networks with few nodes and a stable master oscillator with the one-way topology presenting better results than the two-way arrangement.

scholarly journals Using the RFC 7575 and Models at Runtime for Enabling Autonomic Networking in SDN

2021 ◽  
Author(s):  
Felipe A. Lopes
Keyword(s):  
Network Control ◽  
Network Architectures ◽  
Autonomic Networking ◽  
Performance Requirements ◽  
Autonomic Networks ◽  
Simulated Network ◽  
Programmable Network ◽  
And Performance ◽  
Models At Runtime ◽  
Open Issues

The programmable network architectures that emerged in the last decade have allowed new ways to enable Autonomic Networks. However, there are several open issues to address before making such a possibility into a feasible reality. For instance, defining network goals, translating them into network rules, and granting the correct functioning of the network control loop in a self-adaptive manner are examples of complex tasks required to enable an autonomic networking environment. Fortunately, architectures based on the concept of Models at Runtime (MART) provide ways to overcome such complexity. This paper proposes a MART-based framework – using the RFC 7575 as reference (i.e., definitions and design goals for autonomic networking) – to implement autonomic management into a programmable network. The evaluation shows the proposed framework is suitable for satisfying the functional and performance requirements of a simulated network.

Enhancements of Non-contact Measurements of Electrical Waveforms on the Proximity of a Signal Surface Using Groups of Pulses

2002 ◽  
Author(s):  
Fenglei Du ◽  
Greg Bridges ◽  
D.J. Thomson ◽  
Rama R. Goruganthu ◽  
Shawn McBride ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Signal To Noise Ratio ◽  
Electrostatic Force ◽  
Single Pulse ◽  
Electric Signal ◽  
Measurement Instruments ◽  
Cycle Times ◽  
Force Microscopy ◽  
And Performance

Abstract With the ever-increasing density and performance of integrated circuits, non-invasive, accurate, and high spatial and temporal resolution electric signal measurement instruments hold the key to performing successful diagnostics and failure analysis. Sampled electrostatic force microscopy (EFM) has the potential for such applications. It provides a noninvasive approach to measuring high frequency internal integrated circuit signals. Previous EFMs operate using a repetitive single-pulse sampling approach and are inherently subject to the signal-to-noise ratio (SNR) problems when test pattern duty cycle times become large. In this paper we present an innovative technique that uses groups of pulses to improve the SNR of sampled EFM systems. The approach can easily provide more than an order-ofmagnitude improvement to the SNR. The details of the approach are presented.

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