Enhancements of Non-contact Measurements of Electrical Waveforms on the Proximity of a Signal Surface Using Groups of Pulses

2002 ◽  
Author(s):  
Fenglei Du ◽  
Greg Bridges ◽  
D.J. Thomson ◽  
Rama R. Goruganthu ◽  
Shawn McBride ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Signal To Noise Ratio ◽  
Electrostatic Force ◽  
Single Pulse ◽  
Electric Signal ◽  
Measurement Instruments ◽  
Cycle Times ◽  
Force Microscopy ◽  
And Performance

Abstract With the ever-increasing density and performance of integrated circuits, non-invasive, accurate, and high spatial and temporal resolution electric signal measurement instruments hold the key to performing successful diagnostics and failure analysis. Sampled electrostatic force microscopy (EFM) has the potential for such applications. It provides a noninvasive approach to measuring high frequency internal integrated circuit signals. Previous EFMs operate using a repetitive single-pulse sampling approach and are inherently subject to the signal-to-noise ratio (SNR) problems when test pattern duty cycle times become large. In this paper we present an innovative technique that uses groups of pulses to improve the SNR of sampled EFM systems. The approach can easily provide more than an order-ofmagnitude improvement to the SNR. The details of the approach are presented.

Non-Contact Probing of Integrated Circuits Using Electrostatic Force Sampling

1998 ◽  
Author(s):  
G.E. Bridges ◽  
D.J. Thomson ◽  
R. Qi
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Electrostatic Force ◽  
Test Point ◽  
Measurement Point ◽  
Close Proximity ◽  
Capacitive Loading

Abstract We present a non-contact probing technique for measuring highfrequency voltage waveforms at the internal points of an operating integrated circuit. Internal circuit voltages are measured by sensing the local electrostatic force on a small micromachined probe that is held in close proximity to the circuit measurement point. The instrument currently has a 3GHz bandwidth and a capacitive loading on the test point of less than 1fF. The non-contact technique is capable of measuring signals on passivated interconnects

Sampled waveform measurement in integrated circuits using heterodyne electrostatic force microscopy

1994 ◽  
Vol 65 (11) ◽  
pp. 3378-3381 ◽  
Author(s):  
G. E. Bridges ◽  
R. A. Said ◽  
M. Mittal ◽  
D. J. Thomson
Keyword(s):  
Integrated Circuits ◽  
Electrostatic Force ◽  
Electrostatic Force Microscopy ◽  
Force Microscopy

High Temperature CMOS Circuits on Silicon Carbide

2015 ◽  
Vol 821-823 ◽  
pp. 859-862 ◽  
Author(s):  
E. Ramsay ◽  
James Breeze ◽  
David T. Clark ◽  
A. Murphy ◽  
D. Smith ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Power Dissipation ◽  
Cmos Process ◽  
Low Leakage ◽  
Current Path ◽  
Pulse Width Modulator ◽  
Wide Range ◽  
And Performance

This paper presents the characteristics and performance of a range of Silicon Carbide (SiC) CMOS integrated circuits fabricated using a process designed to operate at temperatures of 300°C and above. The properties of Silicon carbide enable both n-channel and p-channel MOSFETS to operate at temperatures above 400°C [1] and we are developing a CMOS process to exploit this capability [4]. The operation of these transistors and other integrated circuit elements such as resistors and contacts is presented across a temperature range of room temperature to +400°C. We have designed and fabricated a wide range of test and demonstrator circuits. A set of six simple logic parts, such as a quad NAND and NOR gates, have been stressed at 300°C for extended times and performance results such as propagation delay drive levels, threshold levels and current consumption versus stress time are presented. Other circuit implementations, with increased logic complexity, such as a pulse width modulator, a configurable timer and others have also been designed, fabricated and tested. The low leakage characteristics of SiC has allowed the implementation of a very low leakage analogue multiplexer showing less than 0.5uA channel leakage at 400°C. Another circuit implemented in SiC CMOS demonstrates the ability to drive SiC power switching devices. The ability of CMOS to provide an active pull up and active pull down current can provide the charging and discharging current required to drive a power MOSFET switch in less than 100ns. Being implemented in CMOS, the gate drive buffer benefits from having no direct current path from the power rails, except during switching events. This lowers the driver power dissipation. By including multiple current paths through independently switched transistors, the gate drive buffer circuit can provide a high switching current and then a lower sustaining current as required to minimize power dissipation when driving a bipolar switch.

scholarly journals MEMS Design Techniques and Performance Estimation in Connected Cars

2019 ◽  
Vol 9 (2) ◽  
pp. 1734-1739
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Complex Structure ◽  
Optimal Solution ◽  
Learning Technologies ◽  
Performance Estimation ◽  
Automotive Electronics ◽  
Mems Sensor ◽  
Private And Public ◽  
And Performance

In order to design the complex structure, devices , systems of electronic products under the level micrometers the micro-electromechanical and micromachining system (MEMS) are mostly preferred. Micro machining techniques are initially lent directly from electronic integrated circuit (IC) industry. But now there were many techniques proposed with wide variety of transduction directly. Ample variety of MEMS transduction process can be used to convert real-world signal from one to another form. The process of conversion can be can be enabled by combining different sensors, actuators and Microsystems. Due to the process of partial consistency and a growing technology, the complex designs of sophisticated MEMS are produced. The combination of integrated circuits with MEMS can improve performance, but at the rate of development cost, complexity and time. With the fact & fast development and growth in the area of automotive electronics, IoT, cloud computing, artificial intelligence and machine learning technologies prompted us to have higher potential market to make the successful products which can impact the social and economic growth. In addition to this, MEMS are well appropriate for automation, medical electronics, and agriculture and space exploration. Thus will play an important and major role in future mission both in private and public sectors. The major problem in India and other developing countries are safety and security. This paper describes the optimal solution & design methodology to control the user end application using MEMS senso., where the controlling of the machineries can be done by MEMS sensor to control communicate via wireless communication

Experimental Measurement of the Thermal Performance of a Two-Die 3D Integrated Circuit (3D IC)

2013 ◽  
Author(s):  
Leila Choobineh ◽  
Nick Vo ◽  
Trent Uehling ◽  
Ankur Jain
Keyword(s):  
Integrated Circuits ◽  
Thermal Performance ◽  
Integrated Circuit ◽  
Three Dimensional ◽  
Electrical Current ◽  
Thermal Design ◽  
3D Ic ◽  
Thermal Models ◽  
3D Ics ◽  
And Performance

Accurate measurement of the thermal performance of vertically-stacked three-dimensional integrated circuits (3D ICs) is critical for optimal design and performance. Experimental measurements also help validate thermal models for predicting the temperature field in a 3D IC. This paper presents results from thermal measurements on a two-die 3D IC. The experimental setup and procedure is described. Transient and steady-state measurements are made while heating the top die or the bottom die. Results indicate that passage of electrical current through the heaters in top/bottom die induces a measureable temperature rise. There appears to be a unique asymmetry in thermal performance between the top die and the bottom die. The top die is found to heat up faster and more than the bottom die. Results presented in this paper are expected to play a key role in validation of simulation-based and analytical thermal models for 3D ICs, and lead to a better fundamental understanding of heat transport in stacked systems. This is expected to lead to effective thermal design and characterization tools for 3D ICs.

Scanning Electron Microscopy in Hybrid Microelectronics

1976 ◽  
Vol 34 ◽  
pp. 456-457
Author(s):  
S. Khadpe ◽  
R. Faryniak
Keyword(s):  
Integrated Circuits ◽  
Thick Film ◽  
Integrated Circuit ◽  
Failure Modes ◽  
Three Dimensional ◽  
Circuit Components ◽  
Hybrid Microcircuit ◽  
Electrical Connections ◽  
Scanning Electron

The Scanning Electron Microscope (SEM) is an important tool in Thick Film Hybrid Microcircuits Manufacturing because of its large depth of focus and three dimensional capability. This paper discusses some of the important areas in which the SEM is used to monitor process control and component failure modes during the various stages of manufacture of a typical hybrid microcircuit.Figure 1 shows a thick film hybrid microcircuit used in a Motorola Paging Receiver. The circuit consists of thick film resistors and conductors screened and fired on a ceramic (aluminum oxide) substrate. Two integrated circuit dice are bonded to the conductors by means of conductive epoxy and electrical connections from each integrated circuit to the substrate are made by ultrasonically bonding 1 mil aluminum wires from the die pads to appropriate conductor pads on the substrate. In addition to the integrated circuits and the resistors, the circuit includes seven chip capacitors soldered onto the substrate. Some of the important considerations involved in the selection and reliability aspects of the hybrid circuit components are: (a) the quality of the substrate; (b) the surface structure of the thick film conductors; (c) the metallization characteristics of the integrated circuit; and (d) the quality of the wire bond interconnections.

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