A ROS-Simulink Real-Time Communication Bridge Using UDP With a Driver-in-the-Loop Application

2016 ◽  
Author(s):  
Mohamed Wahba ◽  
Robert Leary ◽  
Nicolás Ochoa-Lleras ◽  
Jariullah Safi ◽  
Sean Brennan
Keyword(s):  
Operating System ◽  
Real Time ◽  
High Speed ◽  
Performance Metrics ◽  
Proof Of Concept ◽  
Physical Separation ◽  
Robot Operating System ◽  
Time Latency ◽  
And Performance ◽  
Fast Transmission

This paper presents implementation details and performance metrics for software developed to connect the Robot Operating System (ROS) with Simulink Real-Time (SLRT). The communication takes place through the User Datagram Protocol (UDP) which allows for fast transmission of large amounts of data between the two systems. We use SLRT’s built-in UDP communication and binary packing blocks to send and receive the data over a network. We use implementation metrics from several examples to illustrate the effectiveness and drawbacks of this bridge in a real-time environment. The time latency of the bridge is analyzed by performing loop-back tests and obtaining the statistics of the time delay. A proof of concept experiment is presented that utilizes two laboratories that ran a driver-in-the-loop system despite a large physical separation. This work provides recommendations for implementing data integrity measures as well as the potential to use the system with other applications that demand high speed real-time communication.

scholarly journals Design and implementation of real-time robot operating system based on freertos

2020 ◽  
Vol 1449 ◽  
pp. 012115
Author(s):  
Li Shao ◽  
Chuanxi Wang ◽  
Chong Chu ◽  
Yinan Song ◽  
Haoyu Hu ◽  
...  
Keyword(s):  
Operating System ◽  
Real Time ◽  
Robot Operating System ◽  
Design And Implementation

Improved Wall-following Driving for Robot Operating System-based High-speed Autonomous Mobile Robot

2019 ◽  
Vol 28 (3) ◽  
pp. 156-165
Author(s):  
Seunghan Han ◽  
Yongrae Choi ◽  
Jaepil Yang ◽  
Hyungjun Hwang ◽  
Kihun Kim ◽  
...  
Keyword(s):  
Operating System ◽  
Mobile Robot ◽  
High Speed ◽  
Autonomous Mobile Robot ◽  
Robot Operating System ◽  
Wall Following

scholarly journals A High Speed Redundant IO Bus for Energy Power Controller System

2021 ◽  
Vol 2113 (1) ◽  
pp. 012024
Author(s):  
Qinghui Lou ◽  
Liguo Sun ◽  
Haisong Lu ◽  
Weifeng Xu ◽  
Zhebei Wang ◽  
...  
Keyword(s):  
Operating System ◽  
Real Time ◽  
High Throughput ◽  
High Speed ◽  
Low Voltage ◽  
Differential Signal ◽  
Real Time Operating System ◽  
Power Controller ◽  
Data Feedback ◽  
Memory Monitoring

Abstract This paper designs and implements a High Speed Redundant IO Bus for Energy Power Controller System. The physical layer adopts multi-point low-voltage differential signal standard. This bus has the characteristics of high real-time, high throughput and easy expansion. The controller communicates with IO module by A/B bus alternately, monitors link status in real time and collects IO module data. Non real time slots can be used to control non real time messages for IO modules such as time synchronizing and memory monitoring. The controller ARM core runs QNX real-time operating system, and transmits the message needed to communicate with IO modules to the FPGA through DMA. After receiving the message, the FPGA parses the message and automatically fills in the CRC check code and frame end flag at the end of the message. When the FPGA receives the data feedback from the IO module, it performs CRC verification. If the verification passes, it fills the corresponding module receiving buffer. Otherwise, it fills the CRC verification error flag in the register of the corresponding IO module to reduce the load of the arm core.

scholarly journals Low Complexity FFT Factorization for CS Reconstruction

2020 ◽  
Vol 9 (3) ◽  
pp. 438-442
Keyword(s):  
Real Time ◽  
High Speed ◽  
Performance Metrics ◽  
Matching Pursuit ◽  
Matrix Multiplication ◽  
Low Complexity ◽  
Orthogonal Matching Pursuit ◽  
Reconstruction Algorithms ◽  
Wide Range ◽  
Computationally Intensive

In this paper is presented a novel area efficient Fast Fourier transform (FFT) for real-time compressive sensing (CS) reconstruction. Among various methodologies used for CS reconstruction algorithms, Greedy-based orthogonal matching pursuit (OMP) approach provides better solution in terms of accurate implementation with complex computations overhead. Several computationally intensive arithmetic operations like complex matrix multiplication are required to formulate correlative vectors making this algorithm highly complex and power consuming hardware implementation. Computational complexity becomes very important especially in complex FFT models to meet different operational standards and system requirements. In general, for real time applications, FFT transforms are required for high speed computations as well as with least possible complexity overhead in order to support wide range of applications. This paper presents an hardware efficient FFT computation technique with twiddle factor normalization for correlation optimization in orthogonal matching pursuit (OMP). Experimental results are provided to validate the performance metrics of the proposed normalization techniques against complexity and energy related issues. The proposed method is verified by FPGA synthesizer, and validated with appropriate currently available comparative analyzes.

scholarly journals Design and Implementation of High Speed and Low Power 12-bit SAR ADC using 22nm FinFET

2022 ◽  
Vol 17 ◽  
pp. 1-15
Author(s):  
G. Vasudeva ◽  
B. V. Uma
Keyword(s):  
Low Power ◽  
High Speed ◽  
Performance Metrics ◽  
Sampling Rate ◽  
Geometrical Parameters ◽  
Design Strategies ◽  
Digital To Analog Converter ◽  
Analog To Digital ◽  
Transconductance Amplifier ◽  
And Performance

Successive Approximation Register (SAR) Analog to Digital Converter (ADC) architecture comprises of sub modules such as comparator, Digital to Analog Converter and SAR logic. Each of these modules imposes challenges as the signal makes transition from analog to digital and vice-versa. Design strategies for optimum design of circuits considering 22nm FinFET technology meeting area, timing, power requirements and ADC metrics is presented in this work. Operational Transconductance Amplifier (OTA) based comparator, 12-bit two stage segmented resistive string DAC architecture and low power SAR logic is designed and integrated to form the ADC architecture with maximum sampling rate of 1 GS/s. Circuit schematic is captured in Cadence environment with optimum geometrical parameters and performance metrics of the proposed ADC is evaluated in MATLAB environment. Differential Non Linearity and Integral Non Linearity metrics for the 12-bit ADC is limited to +1.15/-1 LSB and +1.22/-0.69 LSB respectively. ENOB of 10.1663 with SNR of 62.9613 dB is achieved for the designed ADC measured for conversion of input signal of 100 MHz with 20dB noise. ADC with sampling frequency upto 1 GSps is designed in this work with low power dissipation less than 10 mW.

Real-Time Motion Control of a Spark Robot Using the Robot Operating System and MATLAB

2020 ◽  
pp. 731-740
Author(s):  
Wei-Jie Tang ◽  
Feng-Shou Gu ◽  
Rong-Feng Deng ◽  
Zhen-Tao Liu ◽  
Shao-Yong Cao ◽  
...  
Keyword(s):  
Operating System ◽  
Real Time ◽  
Motion Control ◽  
Robot Operating System ◽  
Time Motion

Performance Studies of FTP, Voice and Video over ATM-Wireless Backbone Network

2015 ◽  
Vol 7 (3) ◽  
pp. 38-54
Author(s):  
Nurul I. Sarkar ◽  
Ritchie Qi ◽  
Akbar Hossain
Keyword(s):  
Real Time ◽  
High Speed ◽  
Network Performance ◽  
Performance Metrics ◽  
Service Providers ◽  
Asynchronous Transfer Mode ◽  
Long Distance ◽  
Internet Service ◽  
Atm Network ◽  
Backbone Network

Asynchronous Transfer Mode (ATM) is a high-speed networking technology designed to support real-time applications such as voice and video over both wired and wireless networks. This type of network is being used by medium-to-large organizations and the Internet service providers as backbone network to carry data traffic over long-distance with a guaranteed quality of service (QoS). The guaranteed QoS is achieved through a point-to-point link between end users. While the performance of ATM network over wired network has been studied extensively, the performance of real-time traffic over an ATM-Wireless extension has not been fully explored yet. It is useful to be able to compare the performance of ATM network with and without wireless extension against various network performance metrics to find out the effect of wireless extension on system performance.

Sign in / Sign up

Export Citation Format

Share Document