Cryogenic etch process development for profile control of high aspect-ratio submicron silicon trenches

Author(s):  
Marcel W. Pruessner ◽  
William S. Rabinovich ◽  
Todd H. Stievater ◽  
Doewon Park ◽  
Jeffrey W. Baldwin
2001 ◽  
Vol 14 (3) ◽  
pp. 242-254 ◽  
Author(s):  
Hyun-Mog Park ◽  
D.S. Grimard ◽  
J.W. Grizzle ◽  
F.L. Terry

2000 ◽  
Vol 611 ◽  
Author(s):  
Chien Yu ◽  
Rich Wise ◽  
Anthony Domenicucci

ABSTRACTA highly selective nitride etch was developed for gate stack spacer process in advanced memory programs. Based on methyl fluoride chemistry with better than 8:1 selectivity of nitride:oxide, this process exhibits minimal erosion to the underlying RTO thermal oxide for consistent diffusion ion-implant control. As the groundrule changed to 0.175um and below, a two-step etch scheme was employed to maintain the profile control in high-aspect-ratio structures. The stability and repeatability of the process is demonstrated in the SPC chart of the post etch FTA site measurement.


Author(s):  
Chad Rue

Abstract FIB column performance can be difficult to evaluate, and the traditional metrics of imaging resolution and minimum spot size give little indication of how a FIB system will perform its intended daily tasks. A series of supplemental FIB performance tests is proposed to quantify “milling acuity” under real-world conditions. A quantitative measuring scheme for evaluating the quality of High Aspect Ratio (HAR) vias is proposed, and an example is shown in which the HAR measuring scheme can be used for process development.


2003 ◽  
Vol 150 (10) ◽  
pp. G612 ◽  
Author(s):  
Siddhartha Panda ◽  
Rajiv Ranade ◽  
G. Swami Mathad

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