Capping layers, cleaning method, and rapid thermal processing temperature on cobalt silicide formation

1999 ◽  
Author(s):  
Dinesh Saigal ◽  
Gigi Lai ◽  
Lisa Yang ◽  
Jingang Su ◽  
Ken Ngan ◽  
...  
2002 ◽  
Vol 745 ◽  
Author(s):  
Erik Haralson ◽  
Tobias Jarmar ◽  
Johan Seger ◽  
Henry H. Radamson ◽  
Shi-Li Zhang ◽  
...  

ABSTRACTThe reactions of Ni with polycrystalline Si, Si0.82Ge0.18 and Si0.818Ge0.18C0.002 films in two different configurations during rapid thermal processing were studied. For the usually studied planar configuration with 20 nm thick Ni on 130–290 nm thick Si1-x-yGexCy, NiSi1-xGex(C) forms at 450°C on either Si0.82Ge0.18 or Si0.818Ge0.18C0.002, comparable to NiSi formed on Si. However, the agglomeration of NiSi1-xGex(C) on Si0.818Ge0.18C0.002 occurs at 625°C, about 50°C higher than that of NiSi1-xGex on Si0.82Ge0.18. For thin-film lateral diffusion couples, a 200-nm thick Ni film was in contact with 80–130 nm thick Si1-x-yGexCy through 1–10 μm sized contact openings in a 170 nm thick SiO2 isolation. While the Ni3Si phase was formed for both the Si0.82Ge0.18 and Si0.818Ge0.18C0.002 samples, the presence of 0.2 at.% C caused a slightly slower lateral growth.


1993 ◽  
Vol 63 (1-4) ◽  
pp. 131-134 ◽  
Author(s):  
J.-M. Dilhac ◽  
C. Ganibal ◽  
N. Nolhier ◽  
P.B. Moynagh ◽  
C.P. Chew ◽  
...  

1996 ◽  
Vol 11 (2) ◽  
pp. 412-421 ◽  
Author(s):  
A. V. Amorsolo ◽  
P. D. Funkenbusch ◽  
A. M. Kadin

A parametric study of titanium silicide formation by rapid thermal processing was conducted to determine the effects of annealing temperature (650 °C, 750 °C), annealing time (30 s, 60 s), wet etching (no HF dip, with HF dip), sputter etching (no sputter etch, with sputter etch), and annealing ambient (Ar, N2) on the completeness of conversion of 60 nm Ti on (111)-Si to C54–TiSi2 based on sheet resistance and the uniformity of the sheet resistance measurements across the entire wafer. Statistical analysis of the results showed that temperature, annealing ambient, and sputter etching had the greatest influence. Increasing the temperature and using argon gas instead of nitrogen promoted conversion of the film to C54–TiSi2. On the other hand, sputter etching retarded it. The results also indicated significant interactions among these factors. The best uniformity in sheet resistance was obtained by annealing at 750 °C without sputter etching. The different sheet resistance profiles showed gradients that were consistent with expected profile behaviors, arising from temperature variations across the wafer due to the effect of a flowing cold gas and the effects of the wafer edge and flats.


1996 ◽  
Vol 433 ◽  
Author(s):  
Jianguo Zhu ◽  
Meng Chen ◽  
Wenbing Peng ◽  
Fahua Lan ◽  
E.V. Sviridov ◽  
...  

AbstractThe fabrication methods of ferroelectric (FE) thin films have received special attention in recent years because of the needs of FE thin films integrated with semiconductor devices. Rapid thermal processing (RTP) has developed in fabrication of FE thin films because it can reduce processing temperature and time duration, and it also improves the properties of FE thin films compatible with semiconductor devices. The thin film samples used were prepared by a multi-ion-beam reactive cosputtering system (MIBRECS) at room temperature. The samples were then subjected to a post-deposition annealing in a RTP system. It was found that PbTiO3 (PT) thin film could grow on amorphous or polycrystal interfacial layer and the PT thin films annealed by RTP showed the prefered [110] and [100] textures. The effect of interfacial layer on the crystallization and microstructure of the films was also discussed.


1998 ◽  
Vol 514 ◽  
Author(s):  
Karen Maex ◽  
Eiichi Kondoh ◽  
Anne Lauwers ◽  
Muriel DePotter ◽  
Joris Prost

ABSTRACTThe introduction of rapid thermal processing for silicide formation has triggered a lot of research to temperature uniformity and reproducibility in RTP systems. From the other side there has been the demand to make the process itself as robust as possible for temperature variations. Indeed the way the module is set up can open or close the thermal process window for silicidation. In addition to the temperature, the ambient control is to be taken into account. Although gasses are specified to a low level of contaminants, the RTP step needs to be optimized for optimal contaminant reduction. Besides, the process wafer itself can be a source of contamination. In this paper an overview will be given of the role of temperature and ambient during RTP on the silicidation processes. The effect of the wafer on ambient purity will be highlighted. It will be shown that the latter can also have an impact on other process steps in the interconnect technology.


1992 ◽  
Vol 72 (5) ◽  
pp. 1833-1836 ◽  
Author(s):  
A. K. Pant ◽  
S. P. Murarka ◽  
C. Shepard ◽  
W. Lanford

1998 ◽  
Vol 525 ◽  
Author(s):  
K. Maex ◽  
E. Kondoh ◽  
A. Lauwers ◽  
A. Steegen ◽  
M. De Potter ◽  
...  

ABSTRACTThe introduction of rapid thermal processing for silicide formation has triggered a lot of research to temperature uniformity and reproducibility in RTP systems. In addition to the temperature, the ambient control is to be taken into account. Although gasses are specified to a low level of contaminants, the RTP step needs to be optimised for optimal contaminant reduction. Besides, the process wafer itself is a source of contamination.In this paper an overview will be given of the role of RTP ambient on the silicidation processes. The effect of the wafer on ambient purity will be highlighted. It will be shown that the use of a reactive capping layer during silicidation represents an adequate solution for both sources of contamination.


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