HIGH-FREQUENCY LINEAR MULTIPLE-OUTPUT CMOS TRANSCONDUCTANCE AMPLIFIER FOR CURRENT-MODE FILTERS

2006 ◽  
Vol 15 (05) ◽  
pp. 701-717 ◽  
Author(s):  
HSIAO WEI SU ◽  
YICHUANG SUN
Keyword(s):  
High Frequency ◽  
Dynamic Range ◽  
Low Voltage ◽  
Filter Design ◽  
Current Mode ◽  
Cmos Process ◽  
Common Mode ◽  
Differential Input ◽  
Transconductance Amplifier ◽  
Linear Differential

A high-frequency highly linear tunable CMOS multiple-output operational transconductance amplifier (MO-OTA) for fully balanced current-mode OTA and capacitor (OTA-C) filters is presented. The MO-OTA is based on the cross-coupled pairs at the input and provides two pairs of differential outputs. A simple common-mode feedback (CMFB) circuit to stabilize the DC output levels of the MO-OTA is also proposed and two such CMFB circuits are used by the MO-OTA. The proposed MO-OTA is suitable for relatively low voltage (2.5 V) applications as its circuit has only two MOS transistors between the supply and ground rails. Simulated in a TSMC 0.25 μm CMOS process using PSpice, the MO-OTA has at least ± 0.3 V linear differential input signal swing with a single 2.5 V power supply and operates up to 1 GHz frequency. The MO-OTA has a THD less than -46 dB for a differential input voltage of 0.9 Vp-p at 10 MHz, dynamic range (DR) at THD = -46 dB is over 50 dB, and power consumption (with the common-mode feedback circuit) is below 8 mW for the whole tuning range. A fully balanced multiple loop feedback current-mode OTA-C filter example using the proposed MO-OTA is presented. This example also shows that the current-mode follow-the-leader-feedback (FLF) structure can achieve good performances for OTA-C filter design.

scholarly journals Resistorless Current-Mode First-Order All-Pass Filter with Electronic Tuning Employing Low-Voltage CBTA and Grounded Capacitor

2017 ◽  
Vol 27 (02) ◽  
pp. 1850031 ◽  
Author(s):  
Norbert Herencsar ◽  
Jaroslav Koton ◽  
Abhirup Lahiri ◽  
Umut E. Ayten ◽  
Mehmet Sagbas
Keyword(s):  
Low Voltage ◽  
Current Mode ◽  
Monte Carlo Analysis ◽  
Superior Performance ◽  
Sensitivity Analyses ◽  
Cmos Process ◽  
Pass Filter ◽  
First Order ◽  
Transconductance Amplifier ◽  
Electronic Tuning

In this paper, a new realization of a current-mode first-order all-pass filter (APF) using a single active building block (ABB) and one grounded capacitor is presented. As the ABB, the current backward transconductance amplifier (CBTA) is used, which is one of the most recently reported active elements in the literature. The theoretical results are in detail verified by numerous SPICE simulations using a new low-voltage implementation of CBTA. In the design, the PTM 90[Formula: see text]nm level-7 CMOS process BSIM3v3 parameters with [Formula: see text]0.45[Formula: see text]V supply voltages were used. The proposed resistorless CBTA-C APF provides easy electronic tuning of the pole frequency in the frequency range from 763[Formula: see text]kHz to 17.6[Formula: see text]MHz, which is more than one decade. Maximum power dissipation of the circuit is 828[Formula: see text][Formula: see text]W at bias current 233[Formula: see text][Formula: see text]A. Nonideal, parasitic effects, sensitivity analyses, temperature and noise variation, current swing capability, and Monte Carlo analysis results are also provided. Compared to prior state-of-the-art works, the proposed CBTA-C APF has achieved the highest figure of Merit value, which proves its superior performance.

scholarly journals Toward High Throughput Core-CBCM CMOS Capacitive Sensors for Life Science Applications: A Novel Current-Mode for High Dynamic Range Circuitry

Sensors ◽  
2018 ◽  
Vol 18 (10) ◽  
pp. 3370 ◽  
Author(s):  
Saghi Forouhi ◽  
Rasoul Dehghani ◽  
Ebrahim Ghafar-Zadeh
Keyword(s):  
High Performance ◽  
Life Science ◽  
Dynamic Range ◽  
Current Mode ◽  
Capacitive Sensor ◽  
Oxide Semiconductor ◽  
Capacitance Measurement ◽  
Biological Research ◽  
Cmos Process ◽  
Capacitive Sensors

This paper proposes a novel charge-based Complementary Metal Oxide Semiconductor (CMOS) capacitive sensor for life science applications. Charge-based capacitance measurement (CBCM) has significantly attracted the attention of researchers for the design and implementation of high-precision CMOS capacitive biosensors. A conventional core-CBCM capacitive sensor consists of a capacitance-to-voltage converter (CVC), followed by a voltage-to-digital converter. In spite of their high accuracy and low complexity, their input dynamic range (IDR) limits the advantages of core-CBCM capacitive sensors for most biological applications, including cellular monitoring. In this paper, after a brief review of core-CBCM capacitive sensors, we address this challenge by proposing a new current-mode core-CBCM design. In this design, we combine CBCM and current-controlled oscillator (CCO) structures to improve the IDR of the capacitive readout circuit. Using a 0.18 μm CMOS process, we demonstrate and discuss the Cadence simulation results to demonstrate the high performance of the proposed circuitry. Based on these results, the proposed circuit offers an IDR ranging from 873 aF to 70 fF with a resolution of about 10 aF. This CMOS capacitive sensor with such a wide IDR can be employed for monitoring cellular and molecular activities that are suitable for biological research and clinical purposes.

Design of a New Low Power Fully Differential Amplifier with Settling Time Enhancement Characteristics

2015 ◽  
Vol 24 (06) ◽  
pp. 1550078 ◽  
Author(s):  
Seid Jafar Hosseinipouya ◽  
Farhad Dastadast
Keyword(s):  
High Performance ◽  
Settling Time ◽  
Cmos Process ◽  
Output Stage ◽  
Common Mode ◽  
Class Ab ◽  
Fully Differential ◽  
Op Amp ◽  
Transconductance Amplifier ◽  
Adaptive Biasing

High performance of fully differential operational transconductance amplifier is designed and implemented using a 0.18-μm CMOS process. The implemented op-amp uses common mode feedback (CMFB) circuit operating in weak inversion region which does not affect other electrical characteristics due to eliminating common mode (CM) levels automatically leading to improve CM rejection ratio (CMRR) of the amplifier significantly. Moreover, the output stage has class-AB operation so that its current can be made larger due to increasing the output current dynamically using adaptive biasing circuit. Additionally, the AC currents of the active loads have been significantly reduced using negative impedances to increase the gain of the amplifier. The results show the GBW 2.3 MHz, slew rate 2.6 V/μs and 1% settling time 150 ns with a capacitive load of 15 pF. This amplifier dissipates only 6.2 μW from a 1.2 V power supply.

scholarly journals Advanced Readout System IC Current Mode Semi-Gaussian Shapers Using CCIIs and OTAs

VLSI Design ◽  
2007 ◽  
Vol 2007 ◽  
pp. 1-12 ◽  
Author(s):  
Thomas Noulis ◽  
Constantinos Deradonis ◽  
Stylianos Siskos
Keyword(s):  
Selection Criteria ◽  
Dynamic Range ◽  
Filter Design ◽  
Harmonic Distortion ◽  
Current Mode ◽  
Current Conveyors ◽  
Readout System ◽  
Fully Integrated ◽  
Operational Transconductance Amplifiers ◽  
Transconductance Amplifiers

Novel CMOS current mode shapers for front-end electronics are proposed. In particular, six semi-Gaussian shaper implementations based on second generation current conveyors and operational transconductance amplifiers are designed using advanced filter design techniques. Although all shaper architectures are fully integrated, they satisfy a relatively large peaking time. The topologies are analytically compared in terms of noise performance, power consumption, total harmonic distortion (THD), and dynamic range (DR) in order to examine which is the most preferable in readout applications. Design technique selection criteria are proposed in relation to the shaper structures performance. Analysis is supported by simulations results using SPICE in a 0.6 μm process by Austria Mikro Systeme (AMS).

Realization of Fractional-Order Double-Scroll Chaotic System Using Operational Transconductance Amplifier (OTA)

2017 ◽  
Vol 27 (01) ◽  
pp. 1850006 ◽  
Author(s):  
Mohammad Rafiq Dar ◽  
Nasir Ali Kant ◽  
Farooq Ahmad Khanday
Keyword(s):  
Fractional Order ◽  
Chaotic System ◽  
Low Voltage ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Operational Transconductance Amplifiers ◽  
System A ◽  
Transconductance Amplifier ◽  
Theoretical Predictions

Realization of fractional-order double-scroll chaotic system using Operational Transconductance Amplifiers (OTAs) as active elements are presented in this paper. The fractional-order double-scroll chaotic system has been studied before as well using passive RC-ladder and tree-based structures but in this paper the requisite fractional-order integration has been accomplished through an integer-order multiple-feedback topology. As compared to double or multiple scroll chaotic systems existing in the open literature, the proposed realization offers the advantages of (a) low-voltage implementation, (b) integrablity as the design is resistor- and inductor-less and only grounded components have been employed in the design, and, (c) electronic tunability of the fractional order, time-constants and gain factors. In order to demonstrate the usefulness of the chaotic system, a simple secure message communication system has been designed and verified for its operation. The theoretical predictions of the proposed implementations have been verified by using 0.35[Formula: see text][Formula: see text]m complementary metal oxide semiconductor (CMOS) process file provided by Austrian Micro System (AMS).

scholarly journals A low-voltage CMOS current-mode differential front-end for optical communications

2021 ◽  
Author(s):  
Bendong Sun
Keyword(s):  
Optical Communications ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Current Mode ◽  
Building Blocks ◽  
Switching Noise ◽  
Current Feedback ◽  
Fully Differential ◽  
Digital Circuitry

This thesis deals with the design of a low-voltage fully-differential CMOS current-mode preamplifier for optical communications. An in-depth comparative analysis of the building blocks of low-voltage CMOS current-mode circuits is carried out. Two new bandwidth enhancement techniques, namely inductor series-peaking and current feedback, are introduced and implemented in the design. The feedback also reduces the value of the series-peaking inductor. The minimum supply voltage of the amplifier is only one threshold voltage plus one pinch-off voltage. The preamplifier has a balanced differential topology such that the effect of bias dependent mismatches is minimized and the amplifier is insensitive to the switching noise caused by the digital circuitry. Negative differential current feedbacks are implemented to boost the bandwidth and increase the dynamic range.

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