RNS-to-Binary Converters for New Three-Moduli Sets {2k−3, 2k−2, 2k−1} and {2k+1, 2k+2, 2k+3}

2018 ◽  
Vol 27 (14) ◽  
pp. 1850224 ◽  
Author(s):  
P. S. Phalguna ◽  
Dattaguru V. Kamat ◽  
P. V. Ananda Mohan
Keyword(s):  
State Of The Art ◽  
Number System ◽  
Residue Number System ◽  
Hardware Requirement ◽  
Mixed Radix Conversion ◽  
Residue Number ◽  
Conversion Time

In this paper, mixed radix conversion (MRC)-based residue number system (RNS)-to-binary converters for two new three-moduli sets {2[Formula: see text], 2[Formula: see text], 2[Formula: see text]} and {2[Formula: see text], 2[Formula: see text], 2[Formula: see text]} which are derived from the moduli set {2[Formula: see text], 2[Formula: see text], 2[Formula: see text]} are presented. These have the advantage of having one modulus of the form 2[Formula: see text] or 2[Formula: see text] simplifying computations in one residue channel. The proposed reverse converters are evaluated and compared with state-of-the-art reverse converters proposed in literature for other three-moduli sets regarding hardware requirement and conversion time.

scholarly journals Zero-Aware Low-Precision RNS Scaling Scheme

Axioms ◽  
2021 ◽  
Vol 11 (1) ◽  
pp. 5
Author(s):  
Amir Sabbagh Molahosseini
Keyword(s):  
High Precision ◽  
Deep Neural Networks ◽  
State Of The Art ◽  
Chinese Remainder Theorem ◽  
Number System ◽  
Residue Number System ◽  
Scaling Factor ◽  
Improve Performance ◽  
High Area ◽  
Residue Number

Scaling is one of the complex operations in the Residue Number System (RNS). This operation is necessary for RNS-based implementations of deep neural networks (DNNs) to prevent overflow. However, the state-of-the-art RNS scalers for special moduli sets consider the 2k modulo as the scaling factor, which results in a high-precision output with a high area and delay. Therefore, low-precision scaling based on multi-moduli scaling factors should be used to improve performance. However, low-precision scaling for numbers less than the scale factor results in zero output, which makes the subsequent operation result faulty. This paper first presents the formulation and hardware architecture of low-precision RNS scaling for four-moduli sets using new Chinese remainder theorem 2 (New CRT-II) based on a two-moduli scaling factor. Next, the low-precision scaler circuits are reused to achieve a high-precision scaler with the minimum overhead. Therefore, the proposed scaler can detect the zero output after low-precision scaling and then transform low-precision scaled residues to high precision to prevent zero output when the input number is not zero.

EFFICIENT METHOD FOR DESIGNING MODULO {2n ± k} MULTIPLIERS

2014 ◽  
Vol 23 (01) ◽  
pp. 1450001 ◽  
Author(s):  
HECTOR PETTENGHI ◽  
SORIN COTOFANA ◽  
LEONEL SOUSA
Keyword(s):  
Efficient Method ◽  
State Of The Art ◽  
Number System ◽  
Residue Number System ◽  
The State ◽  
Experimental Results ◽  
Average Improvement ◽  
Residue Number

In this paper, an efficient method for designing memoryless modulo {2n ± k} multipliers is proposed, which can be used to compose larger residue number system (RNS) moduli sets. This technique includes a novel choice for the weights associated with the partial products of the inputs is used, which improves the performance of the resulting multipliers. Experimental results suggest that the use of this choice of input weights in the structure herein proposed, provides an average improvement of 36.3% in area-delay-product (ADP) in comparison with the related state-of-the-art. Furthermore, the structures presented in the state-of-the-art are also improved by 43.5% in ADP.

Interval Estimation of Relative Values in Residue Number System

2017 ◽  
Vol 27 (01) ◽  
pp. 1850004 ◽  
Author(s):  
Konstantin Isupov ◽  
Vladimir Knyazkov
Keyword(s):  
High Speed ◽  
Interval Estimation ◽  
Number System ◽  
Residue Number System ◽  
Floating Point ◽  
Limiting Factor ◽  
Small Integer ◽  
Magnitude Comparison ◽  
Mixed Radix Conversion ◽  
Residue Number

Residue number system (RNS), due to its carry-free nature, is popular in many applications of high-speed computer arithmetic, especially in digital signal processing and cryptography. However, the main limiting factor of RNS is a high complexity of such operations as magnitude comparison, sign determination and overflow detection. These operations have, for many years, been a major obstacle to more widespread use of parallel residue arithmetic. This paper presents a new efficient method to perform these operations, which is based on computation and analysis of the interval estimation for the relative value of an RNS number. The estimation, which is called the interval floating-point characteristic (IFC), is represented by two directed rounded bounds that are fixed-precision numbers. Generally, the time complexities of serial and parallel computations of IFC are linear and logarithmic functions of the size of the moduli set, respectively. The new method requires only small-integer and fixed-precision floating-point operations and focuses on arbitrary moduli sets with large dynamic ranges ([Formula: see text]). Experiments indicate that the performance of the proposed method is significantly higher than that of methods based on Mixed-Radix Conversion.

scholarly journals Reverse convertor design for the 4-moduli set {2ⁿ -1,2ⁿ, 2ⁿ +1,2²ⁿ+¹ -1} based on the mixed-radix conversion

2011 ◽  
Vol 24 (1) ◽  
pp. 89-103
Author(s):  
Negovan Stamenkovic ◽  
Bojan Jovanovic
Keyword(s):  
High Speed ◽  
Number System ◽  
Residue Number System ◽  
Hardware Architecture ◽  
Reverse Conversion ◽  
Reverse Converter ◽  
Mixed Radix Conversion ◽  
Residue Number

The residue number system (RNS) is an integer system capable of supporting high speed concurrent arithmetic. One of the most important consideration when designing RNS system is reverse conversion. The reverse converter for recently proposed for the four-moduli set {2? -1,2?, 2? +1,2??+? -1} is based on new Chinese remainder theorems II (New CRT-II) [6]. This paper presents an alternative architecture derived by Mixed-Radix conversion for this four-moduli set. Due to the using simple multiplicative inverses of the proposed moduli set, it can considerably reduce the complexity of the RNS to binary converter based on the Mixed-Radix conversion. The hardware architecture for the proposed converter is based on the adders and subtractors, without the needed ROM or multipliers.

scholarly journals Robust and Fragile Medical Image Watermarking: A Joint Venture of Coding and Chaos Theories

2018 ◽  
Vol 2018 ◽  
pp. 1-11 ◽  
Author(s):  
Atta Ur Rahman ◽  
Kiran Sultan ◽  
Dhiaa Musleh ◽  
Nahier Aldhafferi ◽  
Abdullah Alqahtani ◽  
...  
Keyword(s):  
Medical Image ◽  
Joint Venture ◽  
State Of The Art ◽  
Image Watermarking ◽  
Region Of Interest ◽  
Number System ◽  
Residue Number System ◽  
The Other ◽  
Residue Number ◽  
Hybrid Watermarking

A secure spatial domain, hybrid watermarking technique for obtaining watermark (authentication information) robustness and fragility of the host medical image (content integrity) using product codes, chaos theory, and residue number system (RNS) is proposed. The proposed scheme is highly fragile and unrecoverable in terms of the host image, but it is significantly robust and recoverable in terms of the watermark. Altering the medical image may result in misdiagnosis, hence the watermark that may contain patient information and organization logo must be protected against certain attacks. The host medical image is separated into two parts, namely, the region of interest (ROI) and region of noninterest (RONI) using a rectangular region. The RONI part is used to embed the watermark information. Moreover, two watermarks are used: one to achieve authenticity of image and the other to achieve the robustness against both incidental and malicious attacks. Effectiveness in terms of security, robustness, and fragility of the proposed scheme is demonstrated by the simulations and comparison with the other state-of-the-art techniques.

scholarly journals High-Performance Computation in Residue Number System Using Floating-Point Arithmetic

Computation ◽  
2021 ◽  
Vol 9 (2) ◽  
pp. 9
Author(s):  
Konstantin Isupov
Keyword(s):  
Graphics Processing Units ◽  
High Performance ◽  
Dynamic Range ◽  
Practical Interest ◽  
Number System ◽  
Residue Number System ◽  
Floating Point ◽  
Mixed Radix Conversion ◽  
Multiple Precision ◽  
Residue Number

Residue number system (RNS) is known for its parallel arithmetic and has been used in recent decades in various important applications, from digital signal processing and deep neural networks to cryptography and high-precision computation. However, comparison, sign identification, overflow detection, and division are still hard to implement in RNS. For such operations, most of the methods proposed in the literature only support small dynamic ranges (up to several tens of bits), so they are only suitable for low-precision applications. We recently proposed a method that supports arbitrary moduli sets with cryptographically sized dynamic ranges, up to several thousands of bits. The practical interest of our method compared to existing methods is that it relies only on very fast standard floating-point operations, so it is suitable for multiple-precision applications and can be efficiently implemented on many general-purpose platforms that support IEEE 754 arithmetic. In this paper, we make further improvements to this method and demonstrate that it can successfully be applied to implement efficient data-parallel primitives operating in the RNS domain, namely finding the maximum element of an array of RNS numbers on graphics processing units. Our experimental results on an NVIDIA RTX 2080 GPU show that for random residues and a 128-moduli set with 2048-bit dynamic range, the proposed implementation reduces the running time by a factor of 39 and the memory consumption by a factor of 13 compared to an implementation based on mixed-radix conversion.

scholarly journals A Division Algorithm in a Redundant Residue Number System Using Fractions

2020 ◽  
Vol 10 (2) ◽  
pp. 695
Author(s):  
Nikolay Chervyakov ◽  
Pavel Lyakhov ◽  
Mikhail Babenko ◽  
Irina Lavrinenko ◽  
Maxim Deryabin ◽  
...  
Keyword(s):  
Chinese Remainder Theorem ◽  
Arithmetic Operation ◽  
Number System ◽  
Residue Number System ◽  
Experimental Simulation ◽  
Division Algorithm ◽  
Reverse Conversion ◽  
Base Extension ◽  
Mixed Radix Conversion ◽  
Residue Number

The residue number system (RNS) is widely used for data processing. However, division in the RNS is a rather complicated arithmetic operation, since it requires expensive and complex operators at each iteration, which requires a lot of hardware and time. In this paper, we propose a new modular division algorithm based on the Chinese remainder theorem (CRT) with fractional numbers, which allows using only one shift operation by one digit and subtraction in each iteration of the RNS division. The proposed approach makes it possible to replace such expensive operations as reverse conversion based on CRT, mixed radix conversion, and base extension by subtraction. Besides, we optimized the operation of determining the most significant bit of divider with a single shift operation of the modular divider. The proposed enhancements make the algorithm simpler and faster in comparison with currently known algorithms. The experimental simulation using Kintex-7 showed that the proposed method is up to 7.6 times faster than the CRT-based approach and is up to 10.1 times faster than the mixed radix conversion approach.

Area Efficient Memoryless Reverse Converter for New Four Moduli Set {2n−1,2n−1,2n+1,22n+1−1}

2018 ◽  
Vol 27 (05) ◽  
pp. 1850075 ◽  
Author(s):  
Ritesh Kumar Jaiswal ◽  
Raj Kumar ◽  
Ram Awadh Mishra
Keyword(s):  
Dynamic Range ◽  
Number System ◽  
Residue Number System ◽  
Hardware Complexity ◽  
Reverse Conversion ◽  
Reverse Converter ◽  
Mixed Radix Conversion ◽  
Residue Number ◽  
Least Area ◽  
State Of Art

The efficiency of residue number system depends on the reverse converter due to several modulo operations like addition, subtraction and multiplication. In this paper, a design of new four moduli set [Formula: see text], reverse converter is presented. The moduli set have moduli with length ranging from ([Formula: see text]) to ([Formula: see text])-bits. The reverse conversion for moduli set [Formula: see text] has been optimized in existing state of art. Thus, proposed converter is based on two new moduli set [Formula: see text] and utilizes the mixed radix conversion. This converter is memoryless, and occupies least area. The proposed converter is based on carry save adder (CSA) and modulo adder enabling more speed and less hardware complexity for dynamic range of [Formula: see text]-bit, offering good area-delay product.

A Scaler Design for the RNS Three-Moduli Set {2n+1−1,2n,2n−1} Based on Mixed-Radix Conversion

2019 ◽  
Vol 29 (03) ◽  
pp. 2050041 ◽  
Author(s):  
Ahmad Hiasat
Keyword(s):  
Number System ◽  
Residue Number System ◽  
Scaling Factor ◽  
Vlsi Layout ◽  
Power Efficient ◽  
Mixed Radix Conversion ◽  
Residue Number ◽  
Text Unit ◽  
Dsp Applications

Adopting the moduli set [Formula: see text] for different DSP applications instead of the traditional moduli set [Formula: see text] has the advantage of excluding modulus [Formula: see text]. A multiply-and-accumulate modulo [Formula: see text] unit is more demanding than a modulo [Formula: see text] unit, which signifies the importance of this adoption. This paper introduces a new design for a scaling unit “Scaler”, that deals with the arithmetic-friendly residue number system (RNS) moduli set [Formula: see text]. The scaling factor is the power-of-two moduli [Formula: see text]. The scaling algorithm is based on the mixed-radix conversion (MRC) technique, which converts RNS-based representation into a weighted representation. The proposed approach is compared with other functionally-identical or functionally-similar scalers that perform scaling for the same moduli set under consideration or for the moduli set [Formula: see text]. The comparison is carried using theoretical unit-gate approach and experimental VLSI layout approach. The proposed scaler is shown to be more area and power-efficient than recently published competitive works.

LARGE DYNAMIC RANGE RNS SYSTEMS AND THEIR RESIDUE TO BINARY CONVERTERS

2007 ◽  
Vol 16 (02) ◽  
pp. 267-286 ◽  
Author(s):  
ALEXANDER SKAVANTZOS ◽  
MOHAMMAD ABDALLAH ◽  
THANOS STOURAITIS
Keyword(s):  
High Speed ◽  
Dynamic Range ◽  
Chinese Remainder Theorem ◽  
Digital Signal ◽  
Number System ◽  
Residue Number System ◽  
New Class ◽  
Mixed Radix Conversion ◽  
Residue Number ◽  
Signal Processors

The Residue Number System (RNS) is an integer system appropriate for implementing fast digital signal processors. It can be used for supporting high-speed arithmetic by operating in parallel channels without need for exchanging information among the channels. In this paper, two novel RNS are proposed. First, a new RNS system based on the modulus set {2n+1, 2n - 1, 2n + 1, 2n + 2(n+1)/2 + 1, 2n - 2(n+1)/2 + 1}, n odd, is developed, along with an efficient implementation of its residue-to-weighted converter. The new RNS is a balanced five-modulus system, appropriate for large dynamic ranges. The proposed residue-to-binary converter is fast and hardware efficient and is based on a one's complement multi-operand adder that adds operands of size only 80% of the size dictated by the system's dynamic range. Second, a new class of multi-modulus RNS systems is proposed. These systems are based on sets consisting of two groups of moduli with the modulus product within one group being of the form 2a(2b - 1), while the modulus product within the other group is of the form 2c - 1. Their RNS-to-weighted converters are based on efficient combinations of the Chinese Remainder Theorem and Mixed Radix Conversion decoding techniques. Systems based on four, five, and seven moduli are constructed and analyzed. The new systems allow efficient implementations for their RNS-to-weighted decoders, imply fast and balanced RNS arithmetic, and may achieve large dynamic ranges. The presented residue-to-weighted converters for these systems rely on simple mod (2x - 1) hardware, which can be easily implemented as one's complement hardware.

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